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L9963T-TR bảng dữ liệu(PDF) 14 Page - STMicroelectronics

tên linh kiện L9963T-TR
Giải thích chi tiết về linh kiện  Automotive general purpose SPI to isolated SPI transceiver
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•
When NSLAVE = 1 (Master configuration), this pin acts as digital input for the selection of CPHA (Clock
PHAse). It is latched during Trimming & Config Latch and should be therefore either shorted to GND or to
VDD:
–
CPHA = 0 (shorted to GND) implies that the SDI signal will be sampled upon the first SCK edge after
NCS assertion.
–
CPHA = 1 (shorted to VDD) implies that the SDI signal will be sampled upon the second SCK edge
after NCS assertion.
The internal pull-up is enabled when L9963T is in Trimming & Config Latch and is kept enabled in Normal state
in order to allow a correct driving of the pin by the open-drain output of the MCU. Moreover, in case of pin loss,
the pull-up guarantees a limp home operation where the transmitter is always enabled. To guarantee standby
consumption requirements, the pull-up is disabled while in Stand-by state.
Figure 8. TXEN/CPHA pin structure
3.2.1.7
TXAMP
TXAMP pin can be used to switch between the two possible ISOline TX amplitude configurations:
•
TXAMP = 0 selects low TX amplitude (RDIFF_ISO_OUTL)
•
TXAMP = 1 selects high TX amplitude (RDIFF_ISO_OUTH)
TXAMP sampling depends on the device state and configuration:
Table 10. TXAMP sampling strategy
L9963T
state
L9963T
configuration
TXAMP sampling
Note
Normal
state
Slave (NSLAVE =
0)
The TXAMP pin is latched upon NCS assertion. Therefore, it must
be stable at least TTXAMP_DEGLITCH + TTXAMP_SETUP before NCS
assertion. Moreover, TXAMP must be kept stable TTXAMP_HOLD
after NCS assertion in order to fulfil hold time constraints.
The new amplitude setting is applied to the TX interface after the
SPI frame has been completely transmitted over the isolated SPI
interface. This allows Managing ISOFREQ And TXAMP Pins For
Communicating With L9963.
In case several SPI
frames are being
pushed into the TX
queue, the setting
applied depends
on the last one
latched (no pipelining
supported).
L9963T
Pin configuration
DS13590 - Rev 4
page 14/45



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