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FDA803D bảng dữ liệu(PDF) 60 Page - STMicroelectronics

tên linh kiện FDA803D
Giải thích chi tiết về linh kiện  1 x 45 W class D digital input automotive power amplifier with diagnostics, wide voltage operation range for car audio and telematic
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FDA803D bảng dữ liệu(HTML) 60 Page - STMicroelectronics

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I2C bus interface
FDA803D
60/78
DocID031487 Rev 2
14.7
I2C timing
This paragraph describes more in detail the I2C bus protocol used and its timings.
Please refer to Table 12 and Figure 72 below.
Figure 72. I2C bus interface timing
Table 12. I2C bus interface timing
Symbol
Parameter
Min
Max
Unit
Fscl
SCL (clock line) frequency
-
400
kHz
Tscl
SCL period
2500
-
ns
Tsclh
SCL high time
0.6
-
μs
Tscll
SCL low time
1.3
-
μs
Tsstart
Setup time for start condition
0.6
-
μs
Thstart
Hold time for start condition
0.6
-
μs
Tsstop
Setup time for stop condition
0.6
-
μs
Tbuf
Bus free time between a stop and a start condition
1.3
-
μs
Tssda
Setup time for data line
100
-
ns
Thsda
Hold time for data line
0(1)
1. Device must internally provide a hold time of at least 300 ns for the SDA signal to bridge the undefined
region of the falling edge of SCL.
-ns
Tf
Fall time for SCL and SDA
-
300
ns



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