L9780 datasheet(36/56 Pages) STMICROELECTRONICS

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Digital interface description

L9780

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DocID026356 Rev 3

Default state for this bit after power on reset: 0.

Bit 46 - 43: CCS[3..0]

These bits are used to select the clean current source on INRC pin, as specified in Table 10.

If the device receives an SPI command in order to modify CCS[3..0] bits in the middle of a

measurement cycle, it stores the new information and applies it at the beginning of the new

measurement cycle. CCS[3..0] bits reported in the output register are the values used in the

last measurement cycle.

Default state for these bits after power on reset: 0000.

Bit 42 - 40: SAMP[2..0]

These bits are used to select the gain of the scaling and FVOUT amplifiers, as specified in

Table 11.

If the device receives an SPI command in order to modify SAMP[2..0] bits in the middle of a

measurement cycle, it stores the new information and applies it at the beginning of the new

measurement cycle. SAMP[2..0] bits reported in the output register are the values used in

the last measurement cycle.

Default state for these bits after power on reset: 000.

Bit 39 - 34: VCCSCAP[5..0]

These bits are used to set the compensation capacitance Cint into VCCS cell. 1pF is

permanently connected as compensation capacitance; to this value the decimal conversion

of VCCSCAP[5..0] sequence has to be added in order to obtain the total capacitance used

as compensation, as follows:

VCCSCAP[5..0] = 000000 => 1 pF

VCCSCAP[5..0] = 111111 => 64 pF

The device is able to change compensation capacitance only when the VCCS is disabled.

The correct selection of Cint depends on the kind of the external resistive network that the

VCCS has to drive; some rules for a correct selection of Cint capacitance are described in

Section 4.9.

For correct use of these bits, refer also to Section 5.5.3.

Default state for these bits after power on reset: 111111.

Bit 33 - 32: MCP[1..0]

These bits are used to set the measurement clock period (Tsmc), as specified in Table 16.

If the device receives an SPI command in order to modify MCP[1..0] bits in the middle of a

measurement cycle, it stores the new information and applies it at the beginning of the new

measurement cycle. MCP[1..0] bits reported in the output register are the values used in the

last measurement cycle.

When the device is configured in synchronous mode, MCP bit configuration is ignored and

the status bits reported in SPI output register is 00.

For the description of the timing sequence refer to Section 4.12.

Default state for these bits after power on reset: 00.

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