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SH79F166AF/044FR bảng dữ liệu(PDF) 52 Page - SINOWEALTH Electronic Ltd |
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SH79F166AF/044FR bảng dữ liệu(HTML) 52 Page - SINOWEALTH Electronic Ltd |
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52 / 113 page ![]() SH79F166A 52 7.9 Interrupt 7.9.1 Feature 14 interrupt sources 4 interrupt priority levels The SH79F166A provides total 14 interrupt sources: 5 external interrupts (INT0/1/2/3/4; INT4 including INT40-43, which share the same vector address), 4 timer interrupts (Timer2, 3, 4, 5), one EUART interrupt, ADC Interrupt, PWM interrupts, SCM interrupt and LPD interrupt. 7.9.2 Interrupt Enable Control Each interrupt source can be individually enabled or disabled by setting or clearing the corresponding bit in the interrupt enable registers IEN0 or IEN1. The IEN0 register also contains global interrupt enable bit, EA, which can enable/disable all the interrupts at once. Generally, after reset, all interrupt enable bits are set to 0, which means that all the interrupts are disabled. Table 7.37 Primary Interrupt Enable Register A8H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 IEN0 EA EADC ET2 ES0 - EX1 ET5 EX0 R/W R/W R/W R/W R/W - R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 - 0 0 0 Bit Number Bit Mnemonic Description 7 EA All interrupt enable bit 0: Disable all interrupt 1: Enable all interrupt 6 EADC ADC interrupt enable bit 0: Disable ADC interrupt 1: Enable ADC interrupt 5 ET2 Timer2 overflow interrupt enable bit 0: Disable Timer2 overflow interrupt 1: Enable Timer2 overflow interrupt 4 ES0 EUART interrupt enable bit 0: Disable EUART interrupt 1: Enable EUART interrupt 2 EX1 External interrupt1 enable bit 0: Disable external interrupt1 1: Enable external interrupt1 1 ET5 Timer5 overflow interrupt enable bit 0: Disable Timer5 overflow interrupt 1: Enable Timer5 overflow interrupt 0 EX0 External interrupt0 enable bit 0: Disable external interrupt0 1: Enable external interrupt0 |
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