7

Device description and operation

7.1

Overview

The RHRPM4423 is a dual inverting low-side driver, which charges and discharges big capacitive loads like

MOSFETs or IGBTs used in power supplies and DC-DC modules. The RHRPM4423 can sink and source 4.5 A on

each low-side driver branch but a higher driving current can be obtained by paralleling its outputs. Even though

this device has been designed to cope with loads requiring high peak current and fast switching time, the ultimate

driving capability depends on the power dissipation in the device, which must be kept below the power dissipation

capability of the package, see Section 8.2 Power dissipation. The RHRPM4423 uses VCC pin to supply and two

ground pins (SGND signal ground and PGND power ground) for return. SGND is used as reference ground for

the input stage and it can be connected to ground of the remote controller. PGND is the reference ground for the

output stage; SGND can bounce +/-5 V versus PGND so that PWM input pin common mode can range +/-5 V

versus PGND. The dual low-side driver has been designed to work with supply voltage in the range from 4.65 V to

18 V. Before VCC overcomes UVLO threshold (VUVLO), the RHRPM4423 keeps off both low-side MOSFETs

(OUTL_x outputs are grounded) then, after UVLO threshold has crossed, PWM input keeps the control of the

driver operations. Input pins (PWM_1 and PWM_2), which are CMOS/TTL compatible, can work with voltages up

to VCC.

7.2

Input stage

PWM inputs of the RHRPM4423 dual inverting low-side driver are compatible to CMOS/TTL levels with capability

to be pulled up to VCC. The relation between PWM_1 and PWM_2 input pins and the corresponding PWM output

are depicted in Figure 5. Time diagram. In the worst case, input levels above 2.0 V are recognized as high logic

between delays in the two branches of the RHRPM4423 assures symmetry in the operations and allows the

parallel output functionality. SGND input stage ground reference can bounce versus PGND +/-5 V.

PWM_x inputs to let the internal circuitry be properly biased.

GIPD180120161051MT

7.3

Output stage

The RHRPM4423 output stage uses ST’s proprietary lateral DMOS. Both NDMOS and PDMOS have been sized

to exhibit high driving peak current as well as low on-resistance. When OUTL_x and OUTH_x are connected

together, the typical peak current is 4.5 A. The device features the adaptive anti-cross-conduction protection. The

RHRPM4423 continuously monitors the status of the internal NDMOS and PDMOS: in case of a PWM transition,

before the desired DMOS switches on, the device awaits until the other DMOS completely turns off. No static

current flows from VCC to ground.

RHRPM4423

Device description and operation

DS11827 - Rev 3

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