ATO25F1GC-30EC datasheet(24/46 Pages) ETC

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Sep.2013. Rev 0.5

1Gbit Serial NAND Flash Memory

8.5

Feature Operation

The GET FEATURES (0Fh) and SET FEATURES (1Fh) commands are used to alter the device

behavior from the default power-on behavior. These commands use a 1-byte feature address to

determine which feature is to be read or modified. Features such as OTP and block locking can

be enabled or disabled by setting specific bits in feature address A0h and B0h (shown in the

following table). The status register is mostly read, except WEL, which is a writable bit with the

WRITE ENABLE (06h) command.

Table 5. Status Registers

Data Bits

Block

Lock

A0h

BRWD(1) Reserved

BP2

BP1

BP0

Reserved Reserved Reserved

OTP

B0h

OTP

Protect

OTP

Enable

Reserved Reserved Reserved Reserved Reserved

Status

C0h

Reserved Reserved Reserved Reserved P_Fail

E_Fail

WEL

OIP

Note: 1. If BRWD is enabled and WP# is LOW, then the block lock register cannot be changed.

8.5.1

OIP bit

The Operation In Progress (OIP) bit indicates whether the memory is busy with a Write Status

no such cycle is in progress.

8.5.2

WEL bit

The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When

set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is

reset and no Write Status Register, Program or Erase instruction is accepted.

8.5.3

BP2, BP1, BP0 bits

The Block Protect (BP2, BP1, BP0) bits define the size of the area to be software protected

against Program and Erase instructions. These bits are written with the Set features instruction.

When one or both of the Block Protect (BP2, BP1, BP0) bits is set to 1, the relevant memory

area becomes protected against Page Program, OTP Program, Block Erase. The Block Protect

(BP2, BP1, BP0) bits can be written provided that the Hardware Protected mode has not been

set.

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