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STM32F405 bảng dữ liệu(PDF) 142 Page - STMicroelectronics |
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STM32F405 bảng dữ liệu(HTML) 142 Page - STMicroelectronics |
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142 / 204 page  Electrical characteristics STM32F405xx, STM32F407xx 142/203 DS8626 Rev 9 Figure 53. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 5.3.26 FSMC characteristics Unless otherwise specified, the parameters given in Table 75 to Table 86 for the FSMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 14, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section Section 5.3.16: I/O port characteristics for more details on the input/output characteristics. Asynchronous waveforms and timings Figure 54 through Figure 57 represent asynchronous waveforms and Table 75 through Table 78 provide the corresponding timings. The results shown in these tables are obtained with the following FSMC configuration: • AddressSetupTime = 1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 • BusTurnAroundDuration = 0x0 In all timing tables, the THCLK is the HCLK clock period. R L C L Buffered/Non-buffered DAC DAC_OUTx Buffer(1) 12-bit digital to analog converter ai17157V3 |
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