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STM32F405 bảng dữ liệu(PDF) 98 Page - STMicroelectronics

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STM32F405 bảng dữ liệu(HTML) 98 Page - STMicroelectronics

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Electrical characteristics
STM32F405xx, STM32F407xx
98/203
DS8626 Rev 9
5.3.7
Wakeup time from low-power mode
The wakeup times given in Table 29 is measured on a wakeup phase with a 16 MHz HSI
RC oscillator. The clock source used to wake up the device depends from the current
operating mode:
•
Stop or Standby mode: the clock source is the RC oscillator
•
Sleep mode: the clock source is the clock that was set before entering Sleep mode.
All timings are derived from tests performed under ambient temperature and VDD supply
voltage conditions summarized in Table 14.
APB2
(up to 84 MHz)
SDIO
7.08
7.92
µA/MHz
TIM1
16.79
15.51
TIM8
17.88
16.53
TIM9
7.64
7.28
TIM10
4.89
4.82
TIM11
5.19
4.82
ADC1(5)
4.67
4.58
ADC2(5)
4.67
4.58
ADC3(5)
4.43
4.44
SPI1
1.32
1.39
USART1
3.51
3.72
USART6
3.55
3.75
SYSCFG
0.74
0.56
1. When the I/O compensation cell is ON, IDD typical value increases by 0.22 mA.
2. The BusMatrix is automatically active when at least one master is ON.
3. To enable an I2S peripheral, first set the I2SMOD bit and then the I2SE bit in the SPI_I2SCFGR register.
4. When the DAC is ON and EN1/2 bits are set in DAC_CR register, add an additional power consumption of
0.8 mA per DAC channel for the analog part.
5. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of
1.6 mA per ADC for the analog part.
Table 28. Peripheral current consumption (continued)
Peripheral
IDD(Typ)(1)
Unit
Scale1
(up t 168 MHz)
Scale2
(up to 144 MHz)



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