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STM32F405 bảng dữ liệu(PDF) 46 Page - STMicroelectronics

tên linh kiện STM32F405
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STM32F405 bảng dữ liệu(HTML) 46 Page - STMicroelectronics

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Pinouts and pin description
STM32F405xx, STM32F407xx
46/203
DS8626 Rev 9
Figure 17. STM32F40xxx WLCSP90 ballout
1. This figure shows the package bump view.
A
VBAT
PC13
PDR_ON
PB4
PD7
PD4
PC12
B
PC15
VDD
PB7
PB3
PD6
PD2
PA15
C
PA0
VSS
PC11
PI0
PB6
PD5
PD1
D
PC2
PB8
PA13
E
PC3
VSS
F
PH1
PA1
G
NRST
H
VSSA
J
PA2
PA4
PA7
PB2
PE11
PB11
PB12
MS30402V1
1
PA14
PI1
PA12
PA10
PA9
PC0
PC9
PC8
PH0
PB13
PC6
PD14
PD12
PE8
PE12
BYPASS_
REG
PD9
PD8
PE9
PB14
2
3
4
5
6
7
8
9
10
VDD
PC14
VCAP_2
PA11
PB5
PD0
PC10
PA8
VSS
VDD
VSS
VDD
PC7
VDD
PE10
PE14
VCAP_1
PD15
PE13
PE15
PD10
PD11
PA3
PA6
PB1
PB10
PB15
PB9
BOOT0
VDDA
PB0
PE7
PA5
Table 6. Legend/abbreviations used in the pinout table
Name
Abbreviation
Definition
Pin name
Unless otherwise specified in brackets below the pin name, the pin function during and after
reset is the same as the actual pin name
Pin type
S
Supply pin
I
Input only pin
I/O
Input / output pin
I/O structure
FT
5 V tolerant I/O
TTa
3.3 V tolerant I/O directly connected to ADC
B
Dedicated BOOT0 pin
RST
Bidirectional reset pin with embedded weak pull-up resistor
Notes
Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Alternate
functions
Functions selected through GPIOx_AFR registers
Additional
functions
Functions directly selected/enabled through peripheral registers



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