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CYUSB2014-BZXI bảng dữ liệu(PDF) 38 Page - Infineon Technologies AG

tên linh kiện CYUSB2014-BZXI
Giải thích chi tiết về linh kiện  SuperSpeed USB Controller
PDF  82 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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CYUSB2014-BZXI bảng dữ liệu(HTML) 38 Page - Infineon Technologies AG

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Datasheet
38
001-52136 Rev. *Y
2022-08-11
EZ-USB FX3
SuperSpeed USB Controller
AC timing parameters
19.3
GPIF II timing
Figure 8
GPIF II timing in Synchronous Mode
Table 13
GPIF II timing parameters in Synchronous Mode [8]
Parameter
Description
Min
Max
Units
Frequency
Interface clock frequency
–
100
MHz
tCLK
Interface clock period
10
–
ns
tCLKH
Clock high time
4
–
ns
tCLKL
Clock low time
4
–
ns
tS
CTL input to clock setup time
2
–
ns
tH
CTL input to clock hold time
0.5
–
ns
tDS
Data in to clock setup time
2
–
ns
tDH
Data in to clock hold time
0.5
–
ns
tCO
Clock to data out propagation delay when DQ bus is already in
output direction
–7
ns
tCOE
Clock to data out propagation delay when DQ lines change to
output from tristate and valid data is available on the DQ bus
–9
ns
tCTLO
Clock to CTL out propagation delay
–
8
ns
tDOH
Clock to data out hold
2
–
ns
tCOH
Clock to CTL out hold
0
–
ns
tHZ
Clock to high-Z
–
8
ns
tLZ
Clock to low-Z
0
–
ns
-
CTL(O UT)
CTL(IN)
tS
tH
tDH
tDS
tCLK
CLK
tCTLO
tCO E
Data(IN)
Data 1
(O UT)
tHZ
tLZ
tDO H
tCO H
tCLKH tCLKL
tLZ
Data 2
(O UT)
tCO
tDO H
DQ [31:0]
Note
8. All parameters guaranteed by design and validated through characterization.



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