AD8384ASVZ datasheet(11/24 Pages) AD

tên linh kiện	AD8384ASVZ

Giải thích chi tiết về linh kiện	10-Bit, 6-Channel Decimating LCD DecDriver-R with Level Shifters

PDF	24 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

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11 / 24 page

AD8384

Rev. 0 | Page 11 of 24

TIMING CHARACTERISTICS

DECDRIVER SECTION

VRH VRL

VID2

VID3

VID4

VID5

VID1

VID0

AD8384

BYP

R/L

CLK

STSQ

XFR

INV

DB(0:9)

2-STAGE

LATCH

SCALING

CONTROL

SEQUENCE

INV CONTROL

CONTROL

BIAS

DAC

Figure 4. Block Diagram

CLK

DB(0:9)

STSQ

XFR

VTH

Figure 5. Input Timing, Even Mode (E/O = HIGH)

CLK

DB(0:9)

STSQ

XFR

VTH

Figure 6. Input Timing, Odd Mode ( E/O = LOW)

CLK

STSQ

XFR

INV

VID(0:5)

t10

50% PIXELS

–6,–5, –4,–3, –2,–1

V1–VFS

V2+VFS

DB(0:9)

–1

–8

–7

–6

–5

–4

–2

–3

50%

PIXELS 0, 1, 2, 3, 4, 5

Figure 7. Output Timing (R/L = Low, E/O = High)

Table 8. Timing Characteristics

Parameter

Conditions

Min

Typ

Max

Unit

CLK to Data Setup Time

CLK to Data Hold Time

CLK to STSQ Setup Time

CLK to STSQ Hold Time

CLK to XFR Setup Time

CLK to XFR Hold Time

CLK High Time

CLK Low Time

2.5

CLK to VIDx Delay

t10

INV to VIDx Delay

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