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PIC16F616-E/ML bảng dữ liệu(PDF) 161 Page - Cirrus Logic

tên linh kiện PIC16F616-E/ML
Giải thích chi tiết về linh kiện  14-Pin Flash-Based, 8-Bit CMOS Microcontrollers
PDF  172 Pages
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nhà sản xuất  APEX [Cirrus Logic]
Trang chủ  http://www.cirrus.com
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PIC16F616-E/ML bảng dữ liệu(HTML) 161 Page - Cirrus Logic

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© 2006 Microchip Technology Inc.
Preliminary
DS41288A-page 159
PIC16F616/16HV616
16-Lead Plastic Quad Flat No Lead Package (ML) 4x4x0.9 mm Body (QFN) – Saw Singulated
2
1
n
D
E
E2
D2
e
b
L
A
A3
EXPOSED
METAL
PAD
OPTIONAL
INDEX
AREA
TOP VIEW
BOTTOM VIEW
(NOTE 2)
(NOTE 1)
A1
K
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
JEDEC equivalent: M0-220 VGGC-3
See ASME Y14.5M
See ASME Y14.5M
* Controlling Parameter
Notes:
INCHES
NOM
.026 BSC
.008 REF
Number of Pins
Overall Height
Overall Width
Contact Width
Overall Length
Contact-to-Exposed Pad §
Exposed Pad Width
Exposed Pad Length
Contact Thickness
Pitch
Standoff
Units
Dimension Limits
e
E2
b
K
D2
D
A3
E
A1
A
.090**
.010
.008
.152
.090
.152
.000
.031
MIN
n
MIN
–
.157
.012
–
–
.035
.157
.001
.110
.014
.163
.110
–
.039
.163
.002
MAX
16
0.65 BSC
0.20 REF
2.29**
3.85
0.25
2.29
0.20
0.80
3.85
0.00
–
0.30
4.00
–
–
0.90
4.00
0.02
NOM
MILLIMETERS*
16
2.80
0.35
4.15
2.80
–
1.00
4.15
0.05
MAX
2. Exposed pad varies according to die attach paddle size.
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
§ Significant Characteristic
Contact Length §
L
.012
.016
0.30
.020
0.40
0.50
** Outside JEDEC Specification
Drawing No. C04-127
Revised 09-13-05



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