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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PIC16F616-E/ML bảng dữ liệu(PDF) 89 Page - Cirrus Logic |
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PIC16F616-E/ML bảng dữ liệu(HTML) 89 Page - Cirrus Logic |
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89 / 172 page  © 2006 Microchip Technology Inc. Preliminary DS41288A-page 87 PIC16F616/16HV616 10.4.2 FULL-BRIDGE MODE In Full-Bridge mode, all four pins are used as outputs. An example of full-bridge application is shown in Figure 10-10. In the Forward mode, pin CCP1/P1A is driven to its active state, pin P1D is modulated, while P1B and P1C will be driven to their inactive state as shown in Figure 10-11. In the Reverse mode, P1C is driven to its active state, pin P1B is modulated, while P1A and P1D will be driven to their inactive state as shown Figure 10-11. P1A, P1B, P1C and P1D outputs are multiplexed with the PORT data latches. The associated TRIS bits must be cleared to configure the P1A, P1B, P1C and P1D pins as outputs. FIGURE 10-10: EXAMPLE OF FULL-BRIDGE APPLICATION P1A P1C FET Driver FET Driver V+ V- Load FET Driver FET Driver P1B P1D QA QB QD QC |
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