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CYT4BFCCJS bảng dữ liệu(PDF) 86 Page - Infineon Technologies AG

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Giải thích chi tiết về linh kiện  TRAVEO??T2G 32-bit Automotive MCU
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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Datasheet
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002-21617 Rev. *J
2022-02-18
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Peripheral clocks
104
PCLK_TCPWM1_CLOCKS59
TCPWM1 Group #0, Counter #59
105
PCLK_TCPWM1_CLOCKS60
TCPWM1 Group #0, Counter #60
106
PCLK_TCPWM1_CLOCKS61
TCPWM1 Group #0, Counter #61
107
PCLK_TCPWM1_CLOCKS62
TCPWM1 Group #0, Counter #62
108
PCLK_TCPWM1_CLOCKS63
TCPWM1 Group #0, Counter #63
109
PCLK_TCPWM1_CLOCKS64
TCPWM1 Group #0, Counter #64
110
PCLK_TCPWM1_CLOCKS65
TCPWM1 Group #0, Counter #65
111
PCLK_TCPWM1_CLOCKS66
TCPWM1 Group #0, Counter #66
112
PCLK_TCPWM1_CLOCKS67
TCPWM1 Group #0, Counter #67
113
PCLK_TCPWM1_CLOCKS68
TCPWM1 Group #0, Counter #68
114
PCLK_TCPWM1_CLOCKS69
TCPWM1 Group #0, Counter #69
115
PCLK_TCPWM1_CLOCKS70
TCPWM1 Group #0, Counter #70
116
PCLK_TCPWM1_CLOCKS71
TCPWM1 Group #0, Counter #71
117
PCLK_TCPWM1_CLOCKS72
TCPWM1 Group #0, Counter #72
118
PCLK_TCPWM1_CLOCKS73
TCPWM1 Group #0, Counter #73
119
PCLK_TCPWM1_CLOCKS74
TCPWM1 Group #0, Counter #74
120
PCLK_TCPWM1_CLOCKS75
TCPWM1 Group #0, Counter #75
121
PCLK_TCPWM1_CLOCKS76
TCPWM1 Group #0, Counter #76
122
PCLK_TCPWM1_CLOCKS77
TCPWM1 Group #0, Counter #77
123
PCLK_TCPWM1_CLOCKS78
TCPWM1 Group #0, Counter #78
124
PCLK_TCPWM1_CLOCKS79
TCPWM1 Group #0, Counter #79
125
PCLK_TCPWM1_CLOCKS80
TCPWM1 Group #0, Counter #80
126
PCLK_TCPWM1_CLOCKS81
TCPWM1 Group #0, Counter #81
127
PCLK_TCPWM1_CLOCKS82
TCPWM1 Group #0, Counter #82
128
PCLK_TCPWM1_CLOCKS83
TCPWM1 Group #0, Counter #83
129
PCLK_TCPWM1_CLOCKS256
TCPWM1 Group #1, Counter #0
130
PCLK_TCPWM1_CLOCKS257
TCPWM1 Group #1, Counter #1
131
PCLK_TCPWM1_CLOCKS258
TCPWM1 Group #1, Counter #2
132
PCLK_TCPWM1_CLOCKS259
TCPWM1 Group #1, Counter #3
133
PCLK_TCPWM1_CLOCKS260
TCPWM1 Group #1, Counter #4
134
PCLK_TCPWM1_CLOCKS261
TCPWM1 Group #1, Counter #5
135
PCLK_TCPWM1_CLOCKS262
TCPWM1 Group #1, Counter #6
136
PCLK_TCPWM1_CLOCKS263
TCPWM1 Group #1, Counter #7
137
PCLK_TCPWM1_CLOCKS264
TCPWM1 Group #1, Counter #8
138
PCLK_TCPWM1_CLOCKS265
TCPWM1 Group #1, Counter #9
139
PCLK_TCPWM1_CLOCKS266
TCPWM1 Group #1, Counter #10
140
PCLK_TCPWM1_CLOCKS267
TCPWM1 Group #1, Counter #11
141
PCLK_TCPWM1_CLOCKS512
TCPWM1 Group #2, Counter #0
142
PCLK_TCPWM1_CLOCKS513
TCPWM1 Group #2, Counter #1
143
PCLK_TCPWM1_CLOCKS514
TCPWM1 Group #2, Counter #2
144
PCLK_TCPWM1_CLOCKS515
TCPWM1 Group #2, Counter #3
Table 20-1
Peripheral clock assignments (continued)
Output
Destination
Description



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