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CYT4BFCCJS bảng dữ liệu(PDF) 63 Page - Infineon Technologies AG

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Giải thích chi tiết về linh kiện  TRAVEO??T2G 32-bit Automotive MCU
PDF  217 Pages
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002-21617 Rev. *J
2022-02-18
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Interrupts and wake-up assignments
313
cpuss_interrupts_dw0_86_IRQn
Active
CPUSS P-DMA0, Channel #86 Interrupt
314
cpuss_interrupts_dw0_87_IRQn
Active
CPUSS P-DMA0, Channel #87 Interrupt
315
cpuss_interrupts_dw0_88_IRQn
Active
CPUSS P-DMA0, Channel #88 Interrupt
316
cpuss_interrupts_dw0_89_IRQn
Active
CPUSS P-DMA0, Channel #89 Interrupt
317
cpuss_interrupts_dw0_90_IRQn
Active
CPUSS P-DMA0, Channel #90 Interrupt
318
cpuss_interrupts_dw0_91_IRQn
Active
CPUSS P-DMA0, Channel #91 Interrupt
319
cpuss_interrupts_dw0_92_IRQn
Active
CPUSS P-DMA0, Channel #92 Interrupt
320
cpuss_interrupts_dw0_93_IRQn
Active
CPUSS P-DMA0, Channel #93 Interrupt
321
cpuss_interrupts_dw0_94_IRQn
Active
CPUSS P-DMA0, Channel #94 Interrupt
322
cpuss_interrupts_dw0_95_IRQn
Active
CPUSS P-DMA0, Channel #95 Interrupt
323
cpuss_interrupts_dw0_96_IRQn
Active
CPUSS P-DMA0, Channel #96 Interrupt
324
cpuss_interrupts_dw0_97_IRQn
Active
CPUSS P-DMA0, Channel #97 Interrupt
325
cpuss_interrupts_dw0_98_IRQn
Active
CPUSS P-DMA0, Channel #98 Interrupt
326
cpuss_interrupts_dw0_99_IRQn
Active
CPUSS P-DMA0, Channel #99 Interrupt
327
cpuss_interrupts_dw0_100_IRQn
Active
CPUSS P-DMA0, Channel #100 Interrupt
328
cpuss_interrupts_dw0_101_IRQn
Active
CPUSS P-DMA0, Channel #101 Interrupt
329
cpuss_interrupts_dw0_102_IRQn
Active
CPUSS P-DMA0, Channel #102 Interrupt
330
cpuss_interrupts_dw0_103_IRQn
Active
CPUSS P-DMA0, Channel #103 Interrupt
331
cpuss_interrupts_dw0_104_IRQn
Active
CPUSS P-DMA0, Channel #104 Interrupt
332
cpuss_interrupts_dw0_105_IRQn
Active
CPUSS P-DMA0, Channel #105 Interrupt
333
cpuss_interrupts_dw0_106_IRQn
Active
CPUSS P-DMA0, Channel #106 Interrupt
334
cpuss_interrupts_dw0_107_IRQn
Active
CPUSS P-DMA0, Channel #107 Interrupt
335
cpuss_interrupts_dw0_108_IRQn
Active
CPUSS P-DMA0, Channel #108 Interrupt
336
cpuss_interrupts_dw0_109_IRQn
Active
CPUSS P-DMA0, Channel #109 Interrupt
337
cpuss_interrupts_dw0_110_IRQn
Active
CPUSS P-DMA0, Channel #110 Interrupt
338
cpuss_interrupts_dw0_111_IRQn
Active
CPUSS P-DMA0, Channel #111 Interrupt
339
cpuss_interrupts_dw0_112_IRQn
Active
CPUSS P-DMA0, Channel #112 Interrupt
340
cpuss_interrupts_dw0_113_IRQn
Active
CPUSS P-DMA0, Channel #113 Interrupt
341
cpuss_interrupts_dw0_114_IRQn
Active
CPUSS P-DMA0, Channel #114 Interrupt
342
cpuss_interrupts_dw0_115_IRQn
Active
CPUSS P-DMA0, Channel #115 Interrupt
343
cpuss_interrupts_dw0_116_IRQn
Active
CPUSS P-DMA0, Channel #116 Interrupt
344
cpuss_interrupts_dw0_117_IRQn
Active
CPUSS P-DMA0, Channel #117 Interrupt
345
cpuss_interrupts_dw0_118_IRQn
Active
CPUSS P-DMA0, Channel #118 Interrupt
346
cpuss_interrupts_dw0_119_IRQn
Active
CPUSS P-DMA0, Channel #119 Interrupt
347
cpuss_interrupts_dw0_120_IRQn
Active
CPUSS P-DMA0, Channel #120 Interrupt
348
cpuss_interrupts_dw0_121_IRQn
Active
CPUSS P-DMA0, Channel #121 Interrupt
349
cpuss_interrupts_dw0_122_IRQn
Active
CPUSS P-DMA0, Channel #122 Interrupt
350
cpuss_interrupts_dw0_123_IRQn
Active
CPUSS P-DMA0, Channel #123 Interrupt
351
cpuss_interrupts_dw0_124_IRQn
Active
CPUSS P-DMA0, Channel #124 Interrupt
352
cpuss_interrupts_dw0_125_IRQn
Active
CPUSS P-DMA0, Channel #125 Interrupt
353
cpuss_interrupts_dw0_126_IRQn
Active
CPUSS P-DMA0, Channel #126 Interrupt
354
cpuss_interrupts_dw0_127_IRQn
Active
CPUSS P-DMA0, Channel #127 Interrupt
355
cpuss_interrupts_dw0_128_IRQn
Active
CPUSS P-DMA0, Channel #128 Interrupt
356
cpuss_interrupts_dw0_129_IRQn
Active
CPUSS P-DMA0, Channel #129 Interrupt
357
cpuss_interrupts_dw0_130_IRQn
Active
CPUSS P-DMA0, Channel #130 Interrupt
Table 14-1
Peripheral interrupt assignments and wake-up sources (continued)
Interrupt
Source
Power Mode
Description



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