ADE1201 datasheet(34/40 Pages) AD

34 / 40 page

ADE1201

Data Sheet

Rev. 0 | Page 34 of 40

BINARY CHANNEL CONFIGURATION REGISTER

Address: 0x007, Reset: 0x0096, Name: BIN_FILTER

Binary channel configuration register.

Table 25. Bit Descriptions for BIN_FILTER

Bits

Bit Name

Description

Reset

Access

BIN_EN

DOUT1 Datapath Enable. When this bit is zero, the comparator output is forced low. Note

that this bit defaults to zero so that the datapath is disabled.

0x0

R/W

BIN_UPDWN

When set, the debounce filter is in up/down mode. By default, the mode is up/clear mode.

0x0

R/W

RESERVED

Reserved.

0x0

[12:0]

BIN_FILTER_VAL

Filter Length. The filter length is in 20 µs increments. Any input glitch less than the filter

length is rejected such that the output does not change. If the filter length is zero, the filter is

bypassed so the output equals the input with no latency.

0x96

R/W

WARNA1 DATAPATH CONFIGURATION REGISTER

Address: 0x008, Reset: 0x80FA, Name: WARNA_FILTER

Warning A datapath configuration register.

Table 26. Bit Descriptions for WARNA_FILTER

Bits

Bit Name

Description

Reset

Access

WARNA_EN

Filter Comparator Enable.

0x1

R/W

WARNA_UPDWN

Filter Up/Down Mode.

0x0

R/W

RESERVED

Reserved.

0x0

[12:0]

WARNA_FILTER_VAL

Filter Length. Filter length is in 20 µs increments. Any input glitch less than the filter

length is rejected such that the output does not change. If the filter length is zero, the

filter is bypassed so the output equals the input with no latency.

0xFA

R/W

WARNB1 DATAPATH CONFIGURATION REGISTER

Address: 0x009, Reset: 0x80FA, Name: WARNB_FILTER

Warning B datapath configuration register.

Table 27. Bit Descriptions for WARNB_FILTER

Bits

Bit Name

Description

Reset

Access

WARNB_EN

Filter Comparator Enable.

0x1

R/W

WARNB_UPDWN

Filter Up/Down Mode.

0x0

R/W

RESERVED

Reserved.

0x0

[12:0]

WARNB_FILTER_VAL

Filter Length. The filter length is in 20 µs increments. Any input glitch less than the filter

length is rejected such that the output does not change. If the filter length is zero, the

filter is bypassed so the output equals the input with no latency.

0xFA

R/W

WARNC1 DATAPATH CONFIGURATION REGISTER

Address: 0x00A, Reset: 0x80FA, Name: WARNC_FILTER

Warning C datapath configuration register.

Table 28. Bit Descriptions for WARNC_FILTER

Bits

Bit Name

Description

Reset

Access

WARNC_EN

Filter Comparator Enable.

0x1

R/W

WARNC_UPDWN

Filter Up/Down Mode.

0x0

R/W

RESERVED

Reserved.

0x0

[12:0]

WARNC_FILTER_VAL

Filter Length. The filter length is in 20 µs increments. Any input glitch less than the filter

length is rejected such that the output does not change. If the filter length is zero, the

filter is bypassed so the output equals the input with no latency.

0xFA

R/W

ADE1201 bảng dữ liệu(PDF) 34 Page - Analog Devices

ADE1201 bảng dữ liệu(HTML) 34 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

bảng dữ liệu tải về

Link URL