AD9986 datasheet(10/37 Pages) AD

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Data Sheet

AD9986

SPECIFICATIONS

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Rev. 0 | 10 of 37

Table 12. JESD204 Transmitter Electrical Specifications

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Standards Compliance

JESD204B and JESD204C

Differential Output Voltage

Maximum strength

675

mV p-p

Differential Termination Impedance

108

120

Ω

Rise Time, tR

20% to 80% into 100 Ω load

Fall Time, tF

20% to 80% into 100 Ω load

SYNCxINB± INPUT1

Where x = 0 or 1

Logic Compliance

LVDS

Differential Input Voltage

240

0.7

1900

mV p-p

Input Common-Mode Voltage

DC-coupled

0.675

RIN (Differential)

kΩ

Input Capacitance (Differential)

SYNCxINB+ INPUT

CMOS input option

Refer to the CMOS Pin Specifications section

1 IEEE 1596.3 standard LVDS compatible.

Table 13. SYSREF Electrical Specifications

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

SYSREF+ AND SYSREF− INPUTS

Logic Compliance

LVDS/LVPECL1

Differential Input Voltage

0.7

1.9

V p-p

Input Common-Mode Voltage Range

DC-coupled

0.675

Input Reference, RIN (Differential)

100

Ω

Input Capacitance (Differential)

1 LVDS means low voltage differential signaling and LVPECL means low voltage positive/pseudo emitter-coupled logic.

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