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ADMV8526ACCZ-R7 bảng dữ liệu(PDF) 3 Page - Analog Devices |
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ADMV8526ACCZ-R7 bảng dữ liệu(HTML) 3 Page - Analog Devices |
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3 / 31 page ![]() Data Sheet ADMV8526 SPECIFICATIONS analog.com Rev. 0 | 3 of 31 TA = 25°C, unless otherwise noted. Table 1. Parameter Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE (fCENTER) 1.25 2.60 GHz BANDWIDTH (3 dB) 9 % BANDWIDTH ADJUSTABILITY ±2 % RESOLUTION 1 % 8 bits per filter REJECTION (20 dB) Low-Side 0.84 × fCENTER GHz High-Side 1.16 × fCENTER GHz RE-ENTRY FREQUENCY >4 GHz ≤30 dB INSERTION LOSS 4 dB RETURN LOSS 20 dB DYNAMIC PERFORMANCE Input Compression (P0.1dB) 24 dBm Input Third-Order Intercept (IP3) 43 dBm Input power (PIN) is 5 dBm, 100 kHz tone separation Group Delay 3.1 ns Amplitude Settling Time 2 µs To within ≤1 dB of static insertion loss Phase Settling Time 12 µs To within ≤2° of static phase Drift Rate Amplitude –0.007 dB/°C At fCENTER = 1.9 GHz Frequency –75 ppm/°C RESIDUAL PHASE NOISE At 1 MHz Offset –169 dBc/Hz At fCENTER = 1.9 GHz SUPPLY VOLTAGE VSS –2.6 –2.5 –2.4 V VDD +3.2 +3.3 +3.4 V SUPPLY CURRENT (STATIC) Static VSS Current (ISS) 2 µA VDD Current (IDD) 125 µA Dynamic IDD fSCLK/4 mA Where fSCLK is the SCLK toggle frequency in MHz, for example, continuous serial peripheral interface (SPI) writing at 10 MHz yields 2.5 mA of dynamic supply current LOGIC (RST, CS, SCLK, SDI, SDO, and SFL) Logic Low −0.3 0 +0.8 V Logic High +1.2 +3.3 +3.6 V |
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