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STM32L031C6 bảng dữ liệu(PDF) 55 Page - STMicroelectronics |
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STM32L031C6 bảng dữ liệu(HTML) 55 Page - STMicroelectronics |
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55 / 126 page ![]() DS10668 Rev 6 55/126 STM32L031x4/6 Electrical characteristics 96 6.3.3 Embedded internal reference voltage The parameters given in Table 23 are based on characterization results, unless otherwise specified. Table 22. Embedded internal reference voltage calibration values Calibration value name Description Memory address VREFINT_CAL Raw data acquired at temperature of 25 °C, VDDA= 3 V 0x1FF8 0078 - 0x1FF8 0079 Table 23. Embedded internal reference voltage(1) Symbol Parameter Conditions Min Typ Max Unit VREFINT out(2) Internal reference voltage – 40 °C < TJ < +125 °C 1.202 1.224 1.242 V TVREFINT Internal reference startup time - - 2 3 ms VVREF_MEAS VDDA voltage during VREFINT factory measure -2.99 3 3.01 V AVREF_MEAS Accuracy of factory-measured VREFINT value(3) Including uncertainties due to ADC and VDDA values -- ±5 mV TCoeff(4) Temperature coefficient –40 °C < TJ < +125 °C - 25 100 ppm/°C ACoeff(4) Long-term stability 1000 hours, T = 25 °C - - 1000 ppm VDDCoeff(4) Voltage coefficient 3.0 V < VDDA < 3.6 V - - 2000 ppm/V TS_vrefint(4)(5) ADC sampling time when reading the internal reference voltage -5 10 - µs TADC_BUF(4) Startup time of reference voltage buffer for ADC -- - 10 µs IBUF_ADC(4) Consumption of reference voltage buffer for ADC - - 13.5 25 µA IVREF_OUT(4) VREF_OUT output current(6) -- - 1 µA CVREF_OUT(4) VREF_OUT output load - - - 50 pF ILPBUF(4) Consumption of reference voltage buffer for VREF_OUT and COMP - - 730 1200 nA VREFINT_DIV1(4) 1/4 reference voltage - 24 25 26 % VREFINT VREFINT_DIV2(4) 1/2 reference voltage - 49 50 51 VREFINT_DIV3(4) 3/4 reference voltage - 74 75 76 1. Refer to Table 35: Peripheral current consumption in Stop and Standby mode for the value of the internal reference current consumption (IREFINT). 2. Guaranteed by test in production. 3. The internal VREF value is individually measured in production and stored in dedicated EEPROM bytes. 4. Guaranteed by design. 5. Shortest sampling time can be determined in the application by multiple iterations. 6. To guarantee less than 1% VREF_OUT deviation. |
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