SPC58EE84C3 datasheet(19/154 Pages) STMICROELECTRONICS

19 / 154 page

DS11646 Rev 4

19/154

SPC58EEx, SPC58NEx

Electrical characteristics

VSS_HV_ADR_D-

VSS_HV_ADV

VSS_HV_ADR_D

differential

voltage

—

–25

—

VDD_HV_ADR_S

SAR ADC

reference

voltage

—

3.0

—

5.5

VDD_HV_ADR_S-

VDD_HV_ADV

SAR ADC

reference

differential

voltage

—

VDD_HV_ADV

-10%

—25

VSS_HV_ADR_S

SAR ADC

ground

reference

voltage

—VSS_HV_ADV

VSS_HV_ADR_S-

VSS_HV_ADV

VSS_HV_ADR_S

differential

voltage

—

–25

—

VRAMP_LV

Slew rate on

core power

supply pins

VDD_LV

VDD_LV_BD

——

V/ms

VRAMP_HV

Slew rate on

HV power

supply

——

—

100

V/ms

VIN

I/O input

voltage range

—0

—

5.5

IINJ1

DC Injection

current (per

pin) without

performance

degradation(9)

(10) (11)

Digital pins and

analog pins

–3.0

—

3.0

IINJ2

Dynamic

Injection

current (per

pin) with

performance

degradation(11)

(12)

Digital pins and

analog pins

–10

—

1. The ranges in this table are design targets and actual data may vary in the given range.

2. The maximum number of PRAM wait states has to be configured accordingly to the system clock frequency. Refer to

Table 6.

3. Maximum operating frequency is applicable to the cores and platform of the device. See the Clock Chapter in the

Microcontroller Reference Manual for more information on the clock limitations for the various IP blocks on the device.

4. Core voltage as measured on device pin to guarantee published silicon performance.

Table 5. Operating conditions (continued)

Symbol

Parameter

Conditions

Value(1)

Unit

Min

Typ

Max

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