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STM8S103F2 bảng dữ liệu(PDF) 69 Page - STMicroelectronics |
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STM8S103F2 bảng dữ liệu(HTML) 69 Page - STMicroelectronics |
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69 / 121 page ![]() DocID15441 Rev 14 69/121 STM8S103F2 STM8S103F3 STM8S103K3 Electrical characteristics 88 10.3.5 Memory characteristics RAM and hardware registers Flash program memory/data EEPROM memory Table 36. RAM and hardware registers Symbol Parameter Conditions Min Unit VRM Data retention mode(1) 1. Minimum supply voltage without losing data stored in RAM (in halt mode or under reset) or in hardware registers (only in halt mode). Guaranteed by design, not tested in production. Halt mode (or reset) VIT-max(2) 2. Refer to Section 10.3: Operating conditions for the value of VIT-max. V Table 37. Flash program memory/data EEPROM memory Symbol Parameter Conditions Min(1) 1. Guaranteed by characterization results. Typ Max Unit VDD Operating voltage (all modes, execution/write/erase) fCPU≤ 16 MHz 2.95 - 5.5 V tprog Standard programming time (including erase) for byte/word/block (1 byte/4 byte/64 byte) -- 6 6.6 ms Fast programming time for 1 block (64 byte) -- 3 3.33 terase Erase time for 1 block (64 byte) - - 3 3.33 NRW Erase/write cycles (program memory)(2) 2. The physical granularity of the memory is 4 byte, so cycling is performed on 4 byte even when a write/erase operation addresses a single byte. TA = +85 °C 100k - - cycle Erase/write cycles (data memory)(2) TA = +125 °C 300k 1M - tRET Data retention (program and data memory) after 10k erase/write cycles at TA= +55 °C TRET = 55 °C 20 - - year Data retention (data memory) after 300k erase/write cycles at TA= +125°C TRET = 85 °C 1 - - IDD Supply current (Flash programming or erasing for 1 to 128 byte) -- 2 - mA |
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