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ATMXT448UD-CCUBHA1 bảng dữ liệu(PDF) 30 Page - Microchip Technology |
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ATMXT448UD-CCUBHA1 bảng dữ liệu(HTML) 30 Page - Microchip Technology |
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30 / 76 page ![]() mXT448UD-CCUBHA1 1.0 DS40002352A-page 30 2021 Microchip Technology Inc. and its subsidiaries 8.5 SDA and SCL The I2C bus transmits data and clock with SDA and SCL, respectively. These are open-drain. The device can only drive these lines low or leave them open. The termination resistors (Rp) pull the line up to VddIO if no I2C device is pulling it down. The termination resistors should be chosen so that the rise times on SDA and SCL meet the I2C specifications for the interface speed being used, bearing in mind other loads on the bus. For best latency performance, it is recommended that no other devices share the I2C bus with the maXTouch controller. 8.6 Clock Stretching The device supports clock stretching in accordance with the I2C specification. It may also instigate a clock stretch if a communications event happens during a period when the device is busy internally. The maximum clock stretch is 2 ms and typically less than 350 µs. |
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