ADAQ23876BBCZ datasheet(25/37 Pages) AD

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Data Sheet

ADAQ23876

THEORY OF OPERATION

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Rev. 0 | 25 of 37

Figure 69. ADAQ23876 µModule Simplified Block Diagram

CIRCUIT INFORMATION

The ADAQ23876 is a precision, high speed, μModule data acquisi-

tion solution that reduces the development cycle of precision meas-

urement systems by transferring the design burden of component

selection, optimization, and layout from the designer to the device.

The ADAQ23876 reduces the end system component count by

combining multiple common signal processing and conditioning

blocks in a single device, including a low noise, fully differential

ADC driver, a stable reference buffer, and a high speed, 16-bit,

15 MSPS SAR ADC. The device also incorporates the Analog

Devices proprietary iPassives technology components necessary

for optimum performance. The superior matching and drift charac-

teristics of the resistors minimizes temperature dependent error

sources.

The ADAQ23876 includes a precision internal 2.048 V reference,

as well as an internal reference buffer. The ADAQ23876 also has

a high speed serial LVDS interface that can output one or two bits

at a time. The fast 15 MSPS throughput with no pipeline latency

makes the ADAQ23876 ideally suited for a wide variety of high

speed applications. The ADAQ23876 dissipates only 143 mW at 15

MSPS.

TRANSFER FUNCTION

The ADAQ23876 μModule digitizes the full-scale voltage of 2×

VREF in to 216 levels, resulting in an LSB size of 125 μV with

REFBUF = 4.096 V. The output data is in twos complement format.

The ideal transfer function is shown in Figure 70. The ideal offset

binary transfer function can be obtained from the twos complement

transfer function by inverting the MSB of each output code.

Figure 70. ADAQ23876 Transfer Function (FSR Is Full-Scale Range)

Table 7. Output Codes and Ideal Input Voltages

Description

Inputs Voltages

Digital Output Code

(Twos Complement,

Hex)

FSR − 1 LSB

(32,767 × VREF)/(32,768 × gain)

0x7FFF

Midscale + 1 LSB VREF/(32,768 × gain)

0x0001

Midscale

0 V

0x0000

Midscale − 1 LSB −VREF/(32,768 × gain)

0xFFFF

−FSR + 1 LSB

−(32,767 × VREF)/ (32,768 × gain)

0x8001

−FSR

−VREF × gain

0x8000

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