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LM4681SQ bảng dữ liệu(PDF) 13 Page - National Semiconductor (TI) |
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LM4681SQ bảng dữ liệu(HTML) 13 Page - National Semiconductor (TI) |
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13 / 19 page ![]() General Features SYSTEM FUNCTIONAL INFORMATION Modulation Technique Unlike typical Class D amplifiers that use single-ended com- parators to generate a pulse-width modulated switching waveform and RC timing circuits to set the switching fre- quency, the LM4681 uses a balanced differential floating modulator. Oscillation is a result of injecting complimentary currents onto the respective plates of a floating, on-die ca- pacitor. The value of the floating capacitor and value of the components in the modulator’s feedback network set the nominal switching frequency at 450kHz. Modulation results from imbalances in the injected currents. The amount of current imbalance is directly proportional to the applied input signal’s magnitude and frequency. Using a balanced, floating modulator produces a Class D amplifier that is immune to common mode noise sources such as substrate noise. This noise occurs because of the high frequency, high current switching in the amplifier’s out- put stage. The LM4681 is immune to this type of noise because the modulator, the components that set its switch- ing frequency, and even the load all float with respect to ground. The balanced modulator’s pulse width modulated output drives the gates of the LM4681’s H-bridge configured output power MOSFETs. The pulse-train present at the power MOSFETs’ output is applied to an LC low pass filter that removes the 450kHz energy component. The filter’s output signal, which is applied to the driven load, is an amplified replica of the audio input signal. Shutdown Function The LM4681’s digitally controlled shutdown function allows the user to place the amplifier in a shutdown mode while the system power supply remains active. Activating shutdown deactivates the output switching waveform and minimizes the quiescent current. Through the SPI/I 2C digital interface, the Mode control register’s Bit 0 is used to control the LM4681’s shutdown function. A logic “0” activates shutdown, whereas a logic “1” returns the amplifier to its operational quiescent state. When the power supply voltage is first ap- plied, the LM4681 is operating in the shutdown mode. For more information on the digital interface, see the section titled “SPI/I 2C Serial Digital Interface.” Mute Function The LM4681’s digitally-controlled mute function allows the user to place the amplifier outputs in a muted mode while the amplifier’s analog input signals remain active. Activating mute internally removes the analog input signal from the Class D and headphone amplifier inputs. While muted, the amplifier inputs and outputs retain their V DD/2 operational bias. Through the SPI/I 2C digital interface, the Mode control register’s Bit 1 is used to control the LM4681’s audio mute function. A logic “0” activates mute, whereas a logic “1” deactivates mute. When the power supply voltage is first applied, the LM4681’s headphone and Class D amplifier outputs are muted. More information on the digital interface is found in the section titled “SPI/I 2C Serial Digital Interface.” Stereo Headphone Amplifier The LM4681’s stereo headphone amplifier operates continu- ously, even while the Class D amplifiers are active. When using headphones to listen to program material, it is usually desirable to stop driving external speakers. This is easily achieved by using the active low HPSEL input. As shown in typical application schematic in Figure 1, with no head- phones connected to the headphone jack the input voltage applied to the HPSEL pin is a logic low. In this state, the Class D amplifiers are active and able to drive external speakers. When headphones are plugged into the head- phone jack, the switch internal to the jack is opened. This changes the voltage applied to the HPSEL pin to a logic high, shutting off the LM4681’s Class D amplifiers. Under Voltage Proctection The under voltage protection disables the output driver sec- tion of the LM4681 while the supply voltage is below 8V. This condition may occur as power is first applied or during low line conditions, changes in load resistance, or when power supply sag occurs. The under voltage protection ensures that all of the LM4681’s power MOSFETs are off. This action eliminates shoot-through current and minimizes output tran- sients during turn-on and turn-off. The under voltage protec- tion gives the digital logic time to stabilize into known states, further minimizing turn output transients. Power Supply Sequencing To ensure best performance, please observe the following power-up sequence. The I 2CV DD supply voltage should be applied first. Do not send any data to the LM4681’s internal registers until the V DD is applied. This takes advantage of the LM4681’s power-on reset, which activates the amplifier’s shutdown and mute. Once I 2CV DD is applied, apply the VDD supply voltage. Prior to removing the two supply voltages, activate shutdown and mute. Turn-On Time The LM4681 has an internal timer that determines the am- plifier’s turn-on time. After power is first applied or the part returns from shutdown, the nominal turn-on time is 600ms. This delay allows all externally applied capacitors to charge to a final value of V DD/2. Further, during turn-on, the outputs are muted. This minimizes output transients that may occur while the part settles into is quiescent operating mode. Output Stage Current Limit and Fault Detection Protection The output stage MOSFETs are protected against output conditions that could otherwise compromise their operational status. The first stage of protection is output current limiting. When conditions that require high currents to drive a load, the LM4681’s current limit circuitry clamps the output current at a nominal value of 2.5A. The output waveform is present, but may be clipped or its amplitude reduced. The same 2.5A nominal current limit also occurs if the amplifier outputs are shorted together or either output is shorted to V DD or GND. The second stage of protection is an onboard fault detection circuit that continuously monitors the signal on each output MOSFET’s gate and compares it against the respective drain voltage. When a condition is detected that violates a MOSFET’s Safe Operating Area (SOA), the drive signal is disconnected from the output MOSFETs’ gates. The fault detect circuit maintains this protective condition for approxi- mately 600ms, at which time the drive signal is reconnected. If the fault condition is no longer present, normal operation resumes. If the fault condition remains, however, the drive signal is again disconnected. www.national.com 13 |
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