Table 3-10. MODE[1:0] Configuration Straps

MODE[1:0] Definition

00b

Reserved

01b

PHY is placed in MII mode with 25 MHz crystal

10b

PHY is placed in RMII mode with 50 MHz REFCLKIN

11b

Reserved

3.5.2

PHY Address (PHYAD[4:0])

The PHYAD[4:0] configuration straps are driven high or low to give each PHY a unique SMI address. This address is

latched into an internal register at the end of a hardware reset. In a multi-transceiver application (such as a switch),

the controller is able to manage each transceiver via the unique address. Each transceiver checks each management

data frame for a matching address in the relevant bits. When a match is recognized, the transceiver responds to that

particular frame.

The LAN8670/2 SMI address must be configured using the PHYAD[4:0] hardware configuration straps to any

value between 0x00 and 0x1F. The LAN8671 SMI address must be configured using the PHYAD[3:0] hardware

configuration straps to any value between 0x00 and 0x0F.

LAN8670/1/2

Pin Description and Configuration

and its subsidiaries

Product Brief

DS60001536E-page 15