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AS3933 bảng dữ liệu(PDF) 30 Page - ams AG |
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AS3933 bảng dữ liệu(HTML) 30 Page - ams AG |
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30 / 64 page ![]() ams Datasheet Page 29 [v1-08] 2015-Sep-02 Document Feedback AS3933 − Detailed Description Figure 30: Writing of a Single Byte (Falling Edge Sampling) Figure 31: Writing of Register Data with Auto-Incrementing Address Reading of Data from Addressable Registers (READ Mode). Once the address has been sent through SPI, the data can be fed through the SDO pin out to the microcontroller. A CS LOW toggling high-low-high has to be performed after finishing the read mode session, in order to indicate the end of the READ command and prepare the Interface to the next command control Byte. To transfer bytes from consecutive addresses, SPI master has to keep the CS signal high and the SCLK clock has to be active as long as data need to be read. CS SCLK SDI 0 0 A5 A4 A3 A2 A1 A0 D5 D4 D3 D2 D1 D0 D7 D6 X X SCLK rising edge Data is transfered from μC SCLK falling edge Data is sampled Data is moved to Address A5-A0 CS falling edge signals end of WRITE Mode Two leading Zeros indicate WRITE Mode CS SCLK SDI 00 A 5 A 4 A 3 A 2 A 1 A 0 D 5 D 4 D 3 D 2 D 1 D 0 D 7 D 6 X X Data is moved to Address <A5-A0 > + n CS falling edge signals end of WRITE Mode Two leading Zeros indicate WRITE Mode D 5 D 4 D 3 D 2 D 1 D 0 D 7 D 6 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 D 7 D 6 D 1 D 0 Data is moved to Address <A5-A0 > + (n-1) Data is moved to Address <A5-A0 > + 1 Data is moved to Address <A5-A0 > |
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