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STM32H750VB bảng dữ liệu(PDF) 308 Page - STMicroelectronics

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STM32H750VB bảng dữ liệu(HTML) 308 Page - STMicroelectronics

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Electrical characteristics (rev V)
STM32H750VB STM32H750ZB STM32H750IB STM32H750XB
308/334
DS12556 Rev 5
Ethernet interface characteristics
Unless otherwise specified, the parameters given in Table 210, Table 211 and Table 212 for
SMI, RMII and MII are derived from tests performed under the ambient temperature,
frcc_c_ck frequency and VDD supply voltage conditions summarized in Table 120: General
operating conditions, with the following configuration:
Output speed is set to OSPEEDRy[1:0] = 10
Capacitive load CL=20 pF
Measurement points are done at CMOS levels: 0.5VDD
IO Compensation cell activated.
HSLV activated when VDD ≤ 2.7 V
VOS level set to VOS1
Refer to Section 7.3.15: I/O port characteristics for more details on the input/output
characteristics:
Figure 111. Ethernet SMI timing diagram
Table 210. Dynamics characteristics: Ethernet MAC signals for SMI (1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Typ
Max
Unit
tMDC
MDC cycle time( 2.5 MHz)
400
400
403
ns
Td(MDIO)
Write data valid time
0.5
1.5
4
tsu(MDIO)
Read data setup time
12.5
-
-
th(MDIO)
Read data hold time
0
-
-
MS31384V1
ETH_MDC
ETH_MDIO(O)
ETH_MDIO(I)
tMDC
td(MDIO)
tsu(MDIO)
th(MDIO)



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