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STM32H750VB bảng dữ liệu(PDF) 144 Page - STMicroelectronics |
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STM32H750VB bảng dữ liệu(HTML) 144 Page - STMicroelectronics |
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144 / 335 page ![]() Electrical characteristics (rev Y) STM32H750VB STM32H750ZB STM32H750IB STM32H750XB 144/334 DS12556 Rev 5 Synchronous waveforms and timings Figure 24 through Figure 27 represent synchronous waveforms and Table 72 through Table 75 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: BurstAccessMode = FMC_BurstAccessMode_Enable MemoryType = FMC_MemoryType_CRAM WriteBurst = FMC_WriteBurst_Enable CLKDivision = 1 DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM In all the timing tables, the Tfmc_ker_ck is the fmc_ker_ck clock period, with the following FMC_CLK maximum values: For 2.7 V<VDD<3.6 V, FMC_CLK =100 MHz at 20 pF For 1.8 V<VDD<1.9 V, FMC_CLK =100 MHz at 20 pF For 1.62 V<VDD<1.8 V, FMC_CLK =100 MHz at 15 pF 1. Guaranteed by characterization results. Table 71. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings(1) Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 9Tfmc_ker_ck – 1 9Tfmc_ker_ck ns tw(NWE) FMC_NWE low time 7Tfmc_ker_ck – 0.5 7Tfmc_ker_ck + 0.5 tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 6Tfmc_ker_ck + 3 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 4Tfmc_ker_ck - 1. Guaranteed by characterization results. |
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