PCF85363ATLSLASHA datasheet(55/86 Pages) NXP

55 / 86 page

NXP Semiconductors

PCF85363A

Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input,

and I2C-bus

7.15.2 CPR: clear prescaler

To set the time for RTC mode accurately or to clear the time in stop-watch mode, the

clear prescaler instruction is needed.

Before sending this instruction, it is recommended to first set stop either by the STOP bit

or by the TS pin (see STOPM bit).

See STOP definition for an explanation on using this instruction.

7.15.3 CTS: clear timestamp

The timestamp registers (address 11h to 22h) can be set to all 0 with this instruction.

7.16 Stop_enable register

Bit

Symbol

Value

Description

0000 000

not used

STOP bit

0[1]

RTC clock runs

7 to 1

STOP

RTC clock is stopped

Table 62. Stop_enable - control of STOP bit (address 2Eh)

[1]

Default value.

The STOP bit stops the time from counting in both RTC mode and stop-watch mode. For

RTC mode STOP is useful to set the time accurately. For stop-watch mode it is the start/

stop control for the watch.

The counter can also be controlled from the TS pin by configuring STOPM in the

Function register (Section 7.13). The internal stop signal is a combination of STOP and

the TS pin state.

STOP bit

TS pin[1][2]

stop signal

Counter

stopped

running

Table 63. Counter stop signal

[1]

Requires STOPM and TSPM[1:0] to be configured.

[2]

TSL = 0 (active HIGH) (Pin_IO register, address 27h).

PCF85363A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.1 — 18 June 2021

55 / 86

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