AS3955 datasheet(59/102 Pages) AMSCO

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ams Datasheet

Page 59

[v1-04] 2016-Feb-03

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AS3955 − Detailed Description

SPI Interface

Communication between AS3955 and microcontroller can be

done via a four-wire Serial Peripheral Interface (SPI) and an

additional interrupt signal. AS3955 acts an SPI slave device, and

it can request MCU attention by sending an interrupt (pin IRQ).

The SCLK frequency can be between 100 kHz and 5 MHz.

Figure 58:

SPI and Interrupt Signals

SPI interface is in reset mode when signal /SS is high, and it is

enabled when /SS is low. It is recommended to keep signal /SS

high whenever the SPI interface is not used. MOSI is sampled

at the falling edge of SCLK. All communication is done in 8-bit

blocks (bytes). First three bits of first byte transmitted after /SS

high to low transition define SPI operation mode. MSB bit is

always transmitted first (valid for address and data). Read and

Write modes support address auto incrementing, which means

that in case some additional data bytes may be sent (read), they

are written to (read from) addresses incremented by 1 after the

address and first data byte.

SPI interface supports the following modes:

• internal registers read and write

• EEPROM read and write

• buffer read and write

• direct commands

Note that in case when logic and EEPROM are supplied from the

VP_IO, the only SPI operations permitted are reading and

writing of EEPROM and registers (see also Power Management).

MISO output is usually in tristate and it is only driven when

output data is available. MOSI and MISO can then be externally

shorted to create a bidirectional signal. When MISO output is

in tristate, it is possible to switch on a 10 kΩ pull down by

activating option bits miso_pd1 and miso_pd2 in IO

Configuration Register.

Name

Signal

Signal Level

Description

/SS

Digital Input with pull up

CMOS

SPI enable (active low)

MOSI

Digital Input

CMOS

Serial data input

MISO

Digital Output with tristate

CMOS

Serial data output

SCLK

Digital Input

CMOS

Clock for serial communication

IRQ

Digital Output

CMOS

Interrupt Output pin (active high)

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