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ADP1974ARUZ-R7 bảng dữ liệu(PDF) 4 Page - Analog Devices

tên linh kiện ADP1974ARUZ-R7
Giải thích chi tiết về linh kiện  Bidirectional, Synchronous PWM Controller for Battery Test and Formation
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ADP1974ARUZ-R7 bảng dữ liệu(HTML) 4 Page - Analog Devices

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ADP1974
Data Sheet
Rev. 0 | Page 4 of 19
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
PRECISION ENABLE LOGIC (EN)
Maximum EN Pin Voltage
60
V
EN Threshold Rising
1.25
1.4
V
EN Threshold Falling
1.1
1.22
V
EN Pin Current
VEN = 5 V, internal pull down
0.32
2
μA
MODE LOGIC
Maximum MODE Pin Voltage
5.5
V
MODE Threshold Rising
1.20
1.5
V
MODE Threshold Falling
0.7
1.05
V
CURRENT LIMIT (CL)
Set Current
ICL
VCL = 0 V
18
20
21
μA
Buck CL Threshold
VCL (BUCK)
250
300
350
mV
Buck Negative Current Threshold
VNC (BUCK)
400
450
500
mV
Boost CL Threshold
VCL (BOOST)
450
500
550
mV
Hiccup Detect Time
RFREQ = 100 kΩ, 500 consecutive clock pulses
5.2
ms
Hiccup Off Time
RFREQ = 100 kΩ, 500 consecutive clock pulses
5.2
ms
VREG
EN = high
LDO Regulator Output Voltage
VVREG
VIN = 6 V to 60 V, no external load
4.9
5
5.1
V
Guaranteed Output Current
IOUT (MAX)
VIN = 6 V, external load
5
mA
Load Regulation
VIN = 6 V, IOUT = 0 mA to 5 mA
4.9
5
5.1
V
FAULT
Maximum FAULT Pin Voltage
VFAULT
60
V
FAULT Threshold Rising
1.2
1.5
V
FAULT Threshold Falling
0.7
1.05
V
FAULT Pin Current
VFAULT = 5 V, internal 8.5 MΩ pull-down resistor
0.49
2
μA
PWM DRIVE LOGIC SIGNALS (DH/DL)
DL Drive Voltage
VDL
No load
VREG
V
DH Drive Voltage
VDH
No load
VREG
V
DL and DH Sink Resistance
IDL = 10 mA
1.2
2.4
Ω
DL and DH Source Resistance
IDL = 10 mA
1.4
2.6
Ω
DL and DH Pull-Down Resistor
0.5
1
1.5
MΩ
THERMAL SHUTDOWN (TSD)
TSD Threshold Rising
150
°C
TSD Threshold Falling
135
°C
1 The DMAX and SCFG current matching specification is calculated by taking the absolute value of the difference between the measured ISCFG and IDMAX currents, dividing
them by the 11 μA typical value, and multiplying this answer by 100.
100
μA
11
(%)
DMAX
SCFG
I
I
t Matching
CFG Curren
DMAX and S



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