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ML2240 bảng dữ liệu(PDF) 5 Page - OKI electronic componets

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FEDL2240DIGEST-02
OKI Semiconductor
ML2240 Family
5/24
Pin No.
Pin Symbol
I/O
Description
45
D4/STASEL
I/O
CPU interface data bus pin in the parallel input interface.
This pin becomes a data input pin when
WR is at "L" level. It becomes
a channel status output pin when
RD is at "L" level. It outputs a BUSY
signal for channel 1. For the serial input interface, it becomes a
channel status changeover pin. When D4/STASEL is at "L" level, the
D3/STA3-D0/STA0 pins output the NCR (Next Command Request)
for each channel. When the D4/STASEL is at "H" level, the
D3/STA3-D0/STA0 pins output
BUSY signals for their corresponding
channels.
46
D5/DO
I/O
CPU interface data bus pin in the parallel input interface.
This pin becomes a data input pin when
WR is at “L” level. It becomes
a channel status output pin when
RD is at “L” level. This pin outputs 2
channels of
BUSY signal.
When
CS and RD are at “L” level, this D5/DO pin serially outputs the
status of each channel in synchronization with D6/SCK clock.
47
D6/SCK
I/O
CPU interface data bus pin in the parallel input interface.
This pin becomes a data input pin when
WR is at "L" level. It becomes
a channel status output pin when
RD is at "L" level. It outputs a BUSY
signal for channel 3.
This pin becomes a serial clock input pin for the serial input interface.
When the SCK pin input is at "L" level on the falling edge of the
CS pin
signal, the DI pin input signal goes into the device on at the rising edge
of the SCK clock, and the data is output from the DO pin. When the
SCK pin input is at "H" level on the falling edge of the
CS pin signal,
the DI pin input signal goes into the device on the falling edge of the
SCK clock, and the data is output from the DO pin.
48
D7/DI
I/O
CPU interface data bus pin in the parallel input interface.
When
WR is at "L" level, it becomes a data input pin. When RD is at
"L" level, it becomes a channel status output pin. It outputs a
BUSY
signal for channel 4.
For the serial input interface, this pin becomes a serial data input pin.
Works as serial data input pin in the serial input interface.
50
DAOL
O
Outputs the left 14-bit DAC analog signal.
51
AOUTL
O
Outputs the left 14-bit DAC analog signal via voltage follower.
53
DAOR
O
Outputs the right 14-bit DAC analog signal.
54
AOUTR
O
Outputs the right 14-bit DAC analog signal via voltage follower.
56
RCS
I
“L” level: RA22-0, A-1, and
ROE pins output the address data and the
output enable signal.
“H” level: RA22-0, A-1, and
ROE pins are in high impedance.
58
ROE
O
Output enable pin for an externally connected memory.
RCS pin = “H” level: High impedance
59
SERIAL
I
CPU interface switching pin.
“H” level: Serial input interface, “L” level: Parallel input interface



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