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MPC8533EVJALGA bảng dữ liệu(PDF) 56 Page - NXP Semiconductors |
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MPC8533EVJALGA bảng dữ liệu(HTML) 56 Page - NXP Semiconductors |
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56 / 112 page ![]() MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 8 56 Freescale Semiconductor PCI 14.2 GPIO AC Electrical Specifications Table 49 provides the GPIO input and output AC timing specifications. Figure 36 provides the AC test load for the GPIO. Figure 36. GPIO AC Test Load 15 PCI This section describes the DC and AC electrical specifications for the PCI bus of the MPC8533E. 15.1 PCI DC Electrical Characteristics Table 50 provides the DC electrical characteristics for the PCI interface. Table 49. GPIO Input AC Timing Specifications Parameter Symbol Typ Unit Notes GPIO inputs—minimum pulse width tPIWID 20 ns 1 Note: 1. GPIO inputs and outputs are asynchronous to any visible clock. GPIO outputs should be synchronized before use by any external synchronous logic. GPIO inputs are required to be valid for at least tPIWID ns to ensure proper operation. Table 50. PCI DC Electrical Characteristics 1 Parameter Symbol Min Max Unit Notes High-level input voltage VIH 2OVDD + 0.3 V — Low-level input voltage VIL –0.3 0.8 V — Input current (VIN = 0 V or VIN = VDD)IIN —±5 μA2 High-level output voltage (OVDD = min, IOH = –2mA) VOH 2.4 — V — Low-level output voltage (OVDD = min, IOL = 2 mA) VOL —0.4 V — Notes: 1. Ranges listed do not meet the full range of the DC specifications of the PCI 2.2 Local Bus Specifications. 2. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2. Output Z0 = 50 Ω OVDD/2 RL = 50 Ω |
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