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DLPC3421 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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DLPC3421 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 63 page ![]() Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications................................................................ 11 6.1 Absolute Maximum Ratings...................................... 11 6.2 ESD Ratings..............................................................11 6.3 Recommended Operating Conditions.......................12 6.4 Thermal Information..................................................12 6.5 Power Electrical Characteristics............................... 13 6.6 Pin Electrical Characteristics.................................... 14 6.7 Internal Pullup and Pulldown Electrical Characteristics.............................................................16 6.8 DMD Sub-LVDS Interface Electrical Characteristics.............................................................17 6.9 DMD Low-Speed Interface Electrical Characteristics.............................................................18 6.10 System Oscillator Timing Requirements................. 19 6.11 Power Supply and Reset Timing Requirements......19 6.12 Parallel Interface Frame Timing Requirements.......20 6.13 Parallel Interface General Timing Requirements.... 21 6.14 BT656 Interface General Timing Requirements......22 6.15 DSI Host Timing Requirements...............................22 6.16 Flash Interface Timing Requirements..................... 23 6.17 Other Timing Requirements....................................24 6.18 DMD Sub-LVDS Interface Switching Characteristics.............................................................24 6.19 DMD Parking Switching Characteristics................. 24 6.20 Chipset Component Usage Specification............... 24 7 Detailed Description......................................................25 7.1 Overview................................................................... 25 7.2 Functional Block Diagram......................................... 25 7.3 Feature Description...................................................26 7.4 Device Functional Modes..........................................39 7.5 Programming............................................................ 39 8 Application and Implementation.................................. 40 8.1 Application Information............................................. 40 8.2 Typical Application.................................................... 40 9 Power Supply Recommendations................................42 9.1 PLL Design Considerations...................................... 42 9.2 System Power-Up and Power-Down Sequence....... 42 9.3 Power-Up Initialization Sequence............................. 46 9.4 DMD Fast Park Control (PARKZ)..............................47 9.5 Hot Plug I/O Usage................................................... 47 10 Layout...........................................................................48 10.1 Layout Guidelines................................................... 48 10.2 Layout Example...................................................... 57 11 Device and Documentation Support..........................58 11.1 Device Support........................................................58 11.2 Related Documentation...........................................60 11.3 Related Links.......................................................... 60 11.4 Receiving Notification of Documentation Updates.. 60 11.5 Support Resources................................................. 60 11.6 Trademarks............................................................. 60 11.7 Electrostatic Discharge Caution.............................. 60 11.8 Glossary.................................................................. 60 12 Mechanical, Packaging, and Orderable Information.................................................................... 60 13 Package Option Addendum........................................61 13.1 Packaging Information............................................ 61 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES October 2021 * Initial Release DLPC3421 DLPS231 – OCTOBER 2021 www.ti.com 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: DLPC3421 |
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