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ADP5350ACPZ-1-R7 bảng dữ liệu(PDF) 63 Page - Analog Devices

tên linh kiện ADP5350ACPZ-1-R7
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ADP5350ACPZ-1-R7 bảng dữ liệu(HTML) 63 Page - Analog Devices

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Data Sheet
ADP5350
Rev. B | Page 63 of 63
OUTLINE DIMENSIONS
Figure 62. 32-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-32-1)
Dimensions shown in millimeters
Figure 63. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.75 mm Package Height
(CP-32-12)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
Package Option
ADP5350ACBZ-1-R7
−40°C to +125°C
32-Ball Wafer Level Chip Scale Package [WLCSP]
CB-32-1
ADP5350ACPZ-1-R7
−40°C to +125°C
32-Lead Lead Frame Chip Scale Package [LFCSP]
CP-32-12
ADP5350CB-EVALZ
Evaluation Board
ADP5350CP-EVALZ
Evaluation Board
1
Z = RoHS Compliant Part.
A
B
C
D
E
F
3.400
3.360
3.320
3.350
3.310
3.270
1
2
3
4
5
6
BOTTOM VIEW
(BALL SIDE UP)
TOP VIEW
(BALL SIDE DOWN)
BALL A1
IDENTIFIER
0.660
0.600
0.540
0.390
0.360
0.330
SIDE VIEW
0.270
0.240
0.210
0.360
0.320
0.280
COPLANARITY
0.04
SEATING
PLANE
2.50
REF
0.50
BSC
0.50
0.40
0.30
1
0.50
BSC
BOTTOM VIEW
TOP VIEW
TOP VIEW
PIN 1
INDICATOR
32
9
16
17
24
25
8
EXPOSED
PAD
SEATING
PLANE
0.05 MAX
0.02 NOM
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.20 MIN
3.75
3.60 SQ
3.55
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD-5
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
©2017–2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14797-0-5/18(B)



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