công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

SH7041A bảng dữ liệu(PDF) 681 Page - Renesas Technology Corp

tên linh kiện SH7041A
Giải thích chi tiết về linh kiện  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A bảng dữ liệu(HTML) 681 Page - Renesas Technology Corp

Back Button SH7041A Datasheet HTML 677Page - Renesas Technology Corp SH7041A Datasheet HTML 678Page - Renesas Technology Corp SH7041A Datasheet HTML 679Page - Renesas Technology Corp SH7041A Datasheet HTML 680Page - Renesas Technology Corp SH7041A Datasheet HTML 681Page - Renesas Technology Corp SH7041A Datasheet HTML 682Page - Renesas Technology Corp SH7041A Datasheet HTML 683Page - Renesas Technology Corp SH7041A Datasheet HTML 684Page - Renesas Technology Corp SH7041A Datasheet HTML 685Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 681 / 923 page
background image
643
• Bits 5 and 4—PE2 Mode 1, 0 (PE2MD1 and PE2MD0): These bits select the function of the
PE2/TIOC0C/
DREQ1 pin.
Bit 5:
PE2MD1
Bit 4:
PE2MD0
Description
0
0
General input/output (PE2) (initial value)
1
MTU input capture input/output compare output (TIOC0C)
10
DREQ1 request receive input (PE2 in single chip mode)
1
Reserved
• Bits 3 and 2—PE1 Mode 1, 0 (PE1MD1 and PE1MD0): These bits select the function of the
PE1/TIOC0B/DRAK0 pin.
Bit 3:
PE1MD1
Bit 2:
PE1MD0
Description
0
0
General input/output (PE1) (initial value)
1
MTU input capture input/output compare output (TIOC0B)
10
DREQ0 request received output (DRAK0) (PE1 in single chip
mode)
1
Reserved
• Bits 1 and 0—PE0 Mode 1, 0 (PE0MD1 and PE0MD0): These bits select the function of the
PE0/TIOC0A/
DREQ0 pin.
Bit 1:
PE0MD1
Bit 0:
PE0MD0
Description
0
0
General input/output (PE0) (initial value)
1
MTU input capture input/output compare output (TIOC0A)
10
DREQ0 request receive input (PE0 in single chip mode)
1
Reserved
18.3.15
IRQOUT Function Control Register (IFCR)
The IFCR is a 16-bit read/write register used to control output when the multiplexed pins are
established as
IRQOUT outputs by the port D control register (PDCRH1) or port E control register
(PECR1). When PDCRH1 or PECR1 are set for any other function, the settings of this register
have no effect on the pin functions.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com