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SH7041A bảng dữ liệu(PDF) 619 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
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Table 16.4
A/D Conversion Time (Single Mode)
CKS=0
CKS=1
Notation Min
Typ
Max
Min
Typ
Max
A/D conversion start delay time t
D
10
—17
6
—9
Input sampling time
t
SPL
—
64—
—
32—
A/D conversion time
t
CCNV
259
—
266
131
—
134
Note:
Numbers in the table are in states (t
cyc ).
16.4.4
External Trigger Input Timing
It is possible to start A/D conversion from an external trigger input. External trigger input is input
from the
ADTRG pin or MTU when the TRGE bit of the A/D control register (ADCR) is set to 1.
A/D conversion is started when the ADST bit of the A/D control/status register (ADCSR) is set to
1 by the
ADTRG input pin last transition edge or MTU trigger. Other operations, regardless of
whether in the single or scan mode, are the same as when setting the ADST bit to 1 with the
software.
Figure 16.6 shows an example of external trigger input timing.
ADTRG
External trigger
signal
A/D conversion
CK
ADST
Figure 16.6 External Trigger Input Timing



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