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SH7041A bảng dữ liệu(PDF) 559 Page - Renesas Technology Corp

tên linh kiện SH7041A
Giải thích chi tiết về linh kiện  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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SH7041A bảng dữ liệu(HTML) 559 Page - Renesas Technology Corp

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521
RDRF
MPIE
RDR
value
ID1
ID2
01
1
1
10
1
MPB
MPB
Serial
data
Start
bit
Data
(ID2)
Data
(data 2)
Stop
bit
Start
bit
Stop
bit
Idling
(marking)
D0
D1
D7
D0
D1
D7
0
RxI interrupt request
(multiprocessor
interrupt), MPIE = 0
RxI interrupt handler
reads data in RDR
and clears RDRF to 0
Station’s ID, so receiving
continues, with data
received by the RxI
interrupt processing routine
MPIE
bit is again
set to 1
MPB
Data2
Example: Own ID matches data, 8-bit data with multiprocessor bit and one stop bit
Figure 14.15 Example of SCI Receive Operation (ID Matches)
14.3.4
Clock Synchronous Operation
In the clock synchronous mode, the SCI transmits and receives data in synchronization with clock
pulses. This mode is suitable for high-speed serial communication.
The SCI transmitter and receiver are independent, so full duplex communication is possible while
sharing the same clock. The transmitter and receiver are also double buffered, so continuous
transmitting or receiving is possible by reading or writing data while transmitting or receiving is in
progress.
Figure 14.16 shows the general format in clock synchronous serial communication.



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