SH7041A datasheet(509/923 Pages) RENESAS

509 / 923 page

471

14.1.3

Pin Configuration

Table 14.1 summarizes the SCI pins by channel.

Table 14.1

SCI Pins

Channel

Pin Name

Abbreviation

Input/Output

Function

Serial clock pin

SCK0

Input/output

SCI0 clock input/output

Receive data pin

RxD0

Input

SCI0 receive data input

Transmit data pin

TxD0

Output

SCI0 transmit data output

Serial clock pin

SCK1

Input/output

SCI1 clock input/output

Receive data pin

RxD1

Input

SCI1 receive data input

Transmit data pin

TxD1

Output

SCI1 transmit data output

14.1.4

Table 14.2 summarizes the SCI internal registers. These registers select the communication mode

(asynchronous or clock synchronous), specify the data format and bit rate, and control the

transmitter and receiver sections.

Table 14.2

Registers

Channel

Name

Abbreviation R/W

Initial

Value

Address*

Access

Size

Serial mode register

SMR0

R/W

H'00

H'FFFF81A0 8, 16

Bit rate register

BRR0

R/W

H'FF

H'FFFF81A1 8, 16

Serial control register

SCR0

R/W

H'00

H'FFFF81A2 8, 16

Transmit data register

TDR0

R/W

H'FF

H'FFFF81A3 8, 16

Serial status register

SSR0

R/(W)*

H'84

H'FFFF81A4 8, 16

Receive data register

RDR0

H'00

H'FFFF81A5 8, 16

Serial mode register

SMR1

R/W

H'00

H'FFFF81B0 8, 16

Bit rate register

BRR1

R/W

H'FF

H'FFFF81B1 8, 16

Serial control register

SCR1

R/W

H'00

H'FFFF81B2 8, 16

Transmit data register

TDR1

R/W

H'FF

H'FFFF81B3 8, 16

Serial status register

SSR1

R/(W)*

H'84

H'FFFF81B4 8, 16

Receive data register

RDR1

H'00

H'FFFF81B5 8, 16

Notes: *1 The only value that can be written is a 0 to clear the flags.

*2 Do not access empty addresses.

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