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SH7041A bảng dữ liệu(PDF) 493 Page - Renesas Technology Corp |
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SH7041A bảng dữ liệu(HTML) 493 Page - Renesas Technology Corp |
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493 / 923 page ![]() 455 Section 13 Watchdog Timer (WDT) 13.1 Overview The watchdog timer (WDT) is a 1-channel timer for monitoring system operations. If a system encounters a problem (crashes, for example) and the timer counter overflows without being rewritten correctly by the CPU, an overflow signal ( WDTOVF) is output externally. The WDT can simultaneously generate an internal reset signal for the entire chip. When the watchdog function is not needed, the WDT can be used as an interval timer. In the interval timer operation, an interval timer interrupt is generated at each counter overflow. The WDT is also used in recovering from the standby mode. 13.1.1 Features • Works in watchdog timer mode or interval timer mode. • Outputs WDTOVF in the watchdog timer mode. When the counter overflows in the watchdog timer mode, overflow signal WDTOVF is output externally. You can select whether to reset the chip internally when this happens. Either the power-on reset or manual reset signal can be selected as the internal reset signal. • Generates interrupts in the interval timer mode. When the counter overflows, it generates an interval timer interrupt. • Clears standby mode. • Works with eight counter input clocks. |
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