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Z8932320FSC bảng dữ liệu(PDF) 5 Page - Zilog, Inc. |
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Z8932320FSC bảng dữ liệu(HTML) 5 Page - Zilog, Inc. |
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5 / 60 page ![]() Z89223/273/323/373 ZiLOG 16-Bit Digital Signal Processors with A/D Converter DS000202-DSP0599 5 TMO1/UO1. Counter/Timer Output or User Output 1 (out- put). Counter/Timer 0 and Counter/Timer 1 can be pro- grammed to provide output on this pin. When User Outputs are enabled, and the Counter/Timer is disabled, this pin pro- vides the complement of Status Register bit 6. TMO2. Counter/Timer 2 Output (output). This pin is the output of Counter/Timer 2 P0.15–P0.0. Port0 (input/output). This is a 16-bit user I/O port. Bits can be configured as input or output or globally as open-drain output. When enabled, Port0 uses the 16 data lines of the ED bus. The function of these pins can be dy- namically changed by writing to the Port0 configuration registers. The High byte can also be configured to Port1 as described in the I/O Port section. P1.7–P1.0. Port1 (input/output). These pins are Port1 in- puts or outputs when not configured for use as special pur- pose peripheral interface. The following eight pin functions preempt use of these pins when enabled. INT2, CLKOUT, SDI, SDO, SS, SCLK, UI0, UI1. Note: These pins are not bonded out on the 44-pin packages. P2.7–P2.0. Port2 (input/output). These pins are Port2 in- puts or outputs when not configured as peripheral interfac- es. The following seven pin functions preempt use of P2.6–P2.0 when enabled. INT0, INT1, TMO0/UO0, TMO1/UO1, WAIT, UI2, TMO2. P2.7 does not include a dual function. Note: P2.7–P2.5 are not bonded out on the 44-pin packages. The following port pins are available only on the 80-pin package: P3.7–P3.4. Port3 (output). These pins are Port3 outputs. P3.3–P3.0. Port3 (input). These pins are Port3 inputs. |
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