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DA9220 bảng dữ liệu(PDF) 6 Page - Dialog Semiconductor |
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DA9220 bảng dữ liệu(HTML) 6 Page - Dialog Semiconductor |
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6 / 62 page ![]() DA9220 High-Performance Dual-Channel DC-DC Converter Datasheet Revision 2.1 17-Sep-2020 CFR0011-120-00 6 of 62 © 2020 Dialog Semiconductor 2 Pinout Figure 4: DA9220 Pinout Diagram (Top View) Table 1: Pin Description Pin No. Pin Name Type (Table 2) Drive (mA) Reset State Description A1, B1 PVDD1 PWR 5000 Supply voltage for Buck1 power stage, decouple with 10 µF and connect to same source as AVDD A2, B2 LX1 AIO 5000 Switch node of Buck1, connect a 100 nH inductor between LX1 and output capacitor A3, B3 PGND1 GND 5000 Buck1 power stage VSS rail A4, B4 PGND2 GND 5000 Buck2 power stage VSS rail A5, B5 LX2 AIO 5000 Switch node of Buck2, connect a 100 nH inductor between LX2 and output capacitor A6, B6 PVDD2 PWR 5000 Supply voltage for Buck2 power stage, decouple with 10 µF and connect to same source as AVDD C1 SCL/GPIO3 DIO 15 I2C clock or general purpose I/O C2 SDA/GPIO4 DIO 15 I2C data or general purpose I/O C3 IC_EN AI 10 Powers up SW control interface and auxiliary circuitry (for example, bandgap, oscillator, and references). C4 CONF/GPIO0 AI/DIO 10 Chip configuration or general purpose I/O C5 GPIO1 DIO 10 General purpose I/O C6 GPIO2 DIO 10 General purpose I/O D1 FB1N AI 10 Buck1 negative node of differential voltage feedback, connect to VSS at point of load D2 FB1P AI 10 Buck1 positive node of differential voltage feedback, connect to VOUT1 at point of load D3 AVDD PWR 10 Supply rail for analog control circuitry, decouple with 1 µF and connect to same source as PVDD |
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