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PCF8553DTT/A bảng dữ liệu(PDF) 29 Page - NXP Semiconductors

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NXP Semiconductors
PCF8553
40 × 4 LCD segment driver
• R/W = 1 and register address
• read data
• read data
• :
• CE set HIGH
aaa-011954
display data
display data
AP[4:0]
R/W default
SCL
SDIO
CE
b7
1
b6
0
b5
0
b4
0
b3
0
b2
1
b1
0
b0
0
b7
1
b6
1
b5
1
b4
0
b3
0
b2
0
b1
0
b0
0
b7
0
b6
0
b5
1
b4
1
b3
0
b2
0
b1
0
b0
0
Data transfers are terminated by de-asserting CE (set CE to logic 1).
Figure 20. SPI-bus read example: reading two data bytes from registers 04h and 05h
10.3 EMC detection
The PCF8553 is ruggedized against EMC susceptibility; however it is not possible to
cover all cases. To detect if a severe EMC event has occurred, it is possible to check the
responsiveness of the device by reading its registers.
11 Internal circuitry
VSS
SCL, SDA, CE
VDD
VSS
RST
VDD
PORE, SDIO, A0,
A1, CLK, IFS
VSS
VSS
VLCD
COM0 to
COM3
SEG0 to
SEG39
aaa-012019
Figure 21. Device protection diagram
PCF8553
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 20 April 2021
29 / 51



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