1.4

Software Library

Firmware (without the boot section), GUI, and API are available on Microchip’s Software Library.

1.5

SPI Communication

The PD39208 manager uses SPI communication in SPI client mode to communicate with the various controllers.

Each manager has an address determined by ADDR0–ADDR3 pins. Each controller can support up to 12 ICs at

addresses 0–11. The actual frequency between PD39210 and PD39208 ICs is 1 MHz.

The following table lists the SPI communication packet structure.

Table 1-1. SPI Communication—Packet Structure

Control Byte Selects

PD39208 According to

Address

R/W Bit

Internal Register

Address

Number of Words

(Read Access Only)

Data Written to IC

(Write Access Only)

Read from IC (Read

Access Only)

8 bits

R(0)/W(1)

8 bits

8 bits

16 bits

For more information about the SPI interface, see the PD39208 Manager Datasheet.

1.6

UART

A pull-up resistor is required on the UART communication line. For more information, see Designing an

IEEE802.3af/at PoE System Based on PD39210/PD39208.

UART communications configuration:

• Bits per second: 19,200 bps

• Data bits: 8

• Parity: None Stop bits: 1

• Flow control: None

1.7

• Address: 7 bits

• Clock stretch: Host should support

• Transaction: 15 bytes or 1 byte

PD39210

Architecture

Datasheet

DS00003554C-page 5