DP8496 datasheet(45/92 Pages) NSC

45 / 92 page

40 Functional Description (Continued)

same as the Wait-for-SelectReceive command except af-

ter receiving the Command Descriptor Block the DP84967

will send a busy status Command Complete message and

will disconnect It will then generate an ‘‘Operation Com-

plete’’ interrupt

The Command Descriptor Block read from the SCSI bus will

not be transferred to buffer memory

This command will remain active until overwritten with an-

other command This command is unique in that it will re-en-

able itself after each successful ‘‘Operation Complete’’ in-

terrupt If the target needs to monitor selection attempts

the desired registers (Identify register) must be read by the

processor before the next selection occurs

Any other interrupt besides ‘‘Operation Complete’’ will

pause this command The Clear Pending Command should

be issued before this interrupt is cleared to prevent the

Wait-for-SelectSend Busy command from re-enabling itself

again after the error is cleared

Self Test Commands

The five self test commands operate exactly the same as

the corresponding non-self test commands However the

SCSI bus is held TRI-STATE

and the inputs are ignored

The SCSI outputs are still active internal to the chip and the

SCSI inputs are emulated for the correct response The oth-

er pins of the DP84967 (non-SCSI) operate normally

Once the first self test command is issued the DP84967

enters its self test mode The Clear Pending Command

must be issued to clear the self test mode Be sure to issue

the Disconnect Self Test command before leaving the self

test mode to ensure that all the internal SCSI bus signals

are deasserted

(Re)Select Self Test (Opcode e 90h)

Operates the same as the (Re)Select command but with all

necessary input handshaking internally generated on chip

This should be the first self test command issued

Disconnect Self Test (Opcode e B2h)

Operates the same as the Disconnect command This com-

mand should be issued before the self test mode is cleared

Send Data Loopback (Opcode e 8Bh)

Operates the same as the Send Data command in the Tar-

get mode The data is read from buffer memory and parity is

checked if enabled The data asserted internally on the

SCSI bus may be monitored by reading the SCSI Data regis-

ter The asynchronous mode must be used

Receive Data Loopback (Opcode e BFh)

Operates the same as the Receive Data command in the

Target mode The processor should initialize the SCSI Data

contents of the SCSI Data register plus parity will be assert-

ed on the internal SCSI data bus The SCSI parity bit is

calculated when a byte is written to the SCSI Data register

by the processor This value will be read and transferred to

buffer memory SCSI parity is checked if enabled The asyn-

chronous mode must be used

Transfer Info Loopback (Opcode e BCh)

Operates the same as the Transfer Info command in the

Initiator mode The IO bit in the SCSI Control register

should be set high or low to indicate the direction of the

transfer The asynchronous mode must be used

If receiving data from the SCSI bus the processor should

initialize the SCSI Data register with a value before this com-

mand is issued The contents of the SCSI Data register plus

parity will be asserted on the internal SCSI data bus The

SCSI parity bit is calculated when a byte is written to the

SCSI Data register by the processor This value will be read

and transferred to buffer memory SCSI parity is checked if

enabled

If sending data to the SCSI bus the data is read from buffer

memory and parity is checked if enabled The data asserted

internally on the SCSI bus may be monitored by reading the

SCSI Data register

Forcing Parity Errors in Self Test Mode

In order to force a SCSI bus parity error in either a Receive

Data Loopback or Transfer Info Loopback (with the IO bit

set to ‘‘1’’ in the SCSI Control register) the following se-

quence may be used

1 Set the SPE (SCSI Parity Enable) bit in the Setup 2 regis-

ter to a ‘‘1’’

2 Issue (Re)Select Self Test

3 Write a byte into SCSI Data register

4 Switch SCSI Parity Polarity (the SPP bit in the Setup 2

5 Issue a receive type loopback command

6 Should obtain parity error in the SCSI Status register

Command Flowcharts

The following flowcharts describe in detail the operation of

the multiphase commands

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