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MCP48FVB21 bảng dữ liệu(PDF) 58 Page - Microchip Technology

tên linh kiện MCP48FVB21
Giải thích chi tiết về linh kiện  8-/10-/12-Bit Single/Dual Voltage Output Volatile Digital-to-Analog Converters with SPI Interface
PDF  84 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP48FVB21 bảng dữ liệu(HTML) 58 Page - Microchip Technology

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MCP48FVBXX
DS20005466A-page 58
 2015 Microchip Technology Inc.
7.2.3
CONTINUOUS READS
Continuous-reads format allows the device’s memory
to be read quickly. Continuous reads are possible to all
memory locations.
Figure 7-7 shows the sequence for three continuous
reads. The reads do not need to be to the same
memory address.
FIGURE 7-7:
Continuous-Reads Sequence.
A
D
4
A
D
3
A
D
2
A
D
1
A
D
0
11
C
M
D
E
R
R
X X X X X X X XXXXXXXXX
111111111111111111111111 Valid (1)
0
0
0
0
0
0
0 (4) 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0Invalid (2, 3)
SDI
SDO
A
D
4
A
D
3
A
D
2
A
D
1
A
D
0
11
C
M
D
E
R
R
X X X X X X X XXXXXXXXX
111111111111111111111111 Valid (1)
0
0
0
0
0
0
0 (4) 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0Invalid (2, 3)
SDI
SDO
A
D
4
A
D
3
A
D
2
A
D
1
A
D
0
11
C
M
D
E
R
R
X X X X X X X XXXXXXXXX
111111111111111111111111 Valid (1)
1111111
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0Invalid (2, 3)
SDI
SDO
Address
Data bits (8, 10, or 12 bits)
Command
Address
Data bits (8, 10, or 12 bits)
Command
Address
Data bits (8, 10, or 12 bits)
Command
Note 1:
If a valid Address/Command occurs, then the data bits are dependent on the resolution of the device.
12-bit = D11:D00, 10-bit = D09:D00, and 8-bit = D07:D00. Data is right justified for ease of Host Controller
operation (i.e., no data manipulation before transmitting the desired value).
2:
Unimplemented data bits (D15:D12 on 12-bit device, D15:D10 on 10-bit device, D15:D08 on 8-bit device)
will be output as ‘1’.
3:
If an Error condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR condition
is cleared (the CS pin is forced to the inactive state).
4:
This CMDERR bit will be forced to ‘0’, regardless if this Address+Command combination is valid. This
command will not be completed and requires the CS pin to return to VIH to clear the CMDERR condition.



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