MCP39F511N datasheet(32/61 Pages) MICROCHIP

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 2015-2018 Microchip Technology Inc.

DS20005473B-page 32

MCP39F511N

6.5.2

24-BIT ADC RESET MODE

(SOFT RESET MODE)

24-bit ADC Reset mode (also called Soft Reset) can

only be entered by setting high the RESET<1:0> bits in

the System Status Register. This mode is defined as

the condition where the converters are active but their

output is forced to ‘0’.

6.5.3

ADC SHUTDOWN MODE

ADC Shutdown mode is defined as a state where the

converters and their biases are OFF, consuming only

leakage current. When the Shutdown bit is reset to ‘0’,

the analog biases will be enabled, as well as the clock

and the digital circuitry.

Each converter can be placed in Shutdown mode

independently. This mode is only available through

programming of the SHUTDOWN<1:0> bits in the

System Status Register.

6.5.4

VREF TEMPERATURE

COMPENSATION

The internal voltage reference comprises a proprietary

circuit and algorithm to compensate first-order and

second-order

temperature

coefficients.

The

compensation allows very low temperature coefficients

(typically 10 ppm/°C)

on the entire range of

temperatures from -40°C to +125°C. This temperature

coefficient varies from part to part.

The default value of this register is set to 0x42. The

typical variation of the temperature coefficient of the

internal voltage reference, with respect to VREFCAL

FIGURE 6-1:

VREF Tempco vs. VREFCAL

Trimcode Chart.

128

192

256

VREFCAL Register Trim Code (decimal)

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