FTS64K datasheet(19/44 Pages) FREESCALE

19 / 44 page

FTS64K Block User Guide — Version V01.00

The Flash module has hardware interlocks which protect data from accidental corruption. One protected

sector is located at the higher address end, just below $FFFF. Another protected sector is located at the

lower address end, just after the beginning of the Flash code implementation at address $4000. Both the

high and low address protected sectors in the Flash can be sized from 512 bytes to 4K bytes. The middle

Flash page can also exhibit protectable areas as indicated in the memory map summary Table 3-2.

The NVM module also contains a set of 16 control and status registers located in address space BASE +

$100 to BASE + $10F. A summary of these registers is given in Table 3-3.

NOTE:

defined at the MCU level and the Address Offset is defined at the module level.

3.3 Register Descriptions

3.3.1 FCLKDIV — Flash Clock Divider Register

The FCLKDIV register is used to control timed events in program and erase algorithms.

Table 3-3 FTS64K Memory Map

Address

Offset

Use

Access

$_00

Flash Clock Divider Register (FCLKDIV)

R/W

$_03

Flash Security Register (FSEC)

$_02

RESERVED11

NOTES:

1. RESERVED2 intended for factory test purposes only.

$_03

Flash Conﬁguration Register (FCNFG)

R/W

$_04

Flash Protection Register (FPROT)

R/W

$_05

Flash Status Register (FSTAT)

R/W

$_06

Flash Command Register (FCMD)

R/W

$_07

RESERVED22

2. RESERVED3 intended for factory test purposes only.

$_08

RESERVED33

3. RESERVED4 intended for factory test purposes only.

$_09

RESERVED44

4. RESERVED5 intended for factory test purposes only.

$_0A

RESERVED55

5. RESERVED6 intended for factory test purposes only.

$_0B

RESERVED66

6. RESERVED7 intended for factory test purposes only.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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