FTS64K datasheet(32/44 Pages) FREESCALE

32 / 44 page

FTS64K Block User Guide — Version V01.00

4.1.2 Program and Erase Sequences in User Mode

A Command State Machine is used to supervise the write sequencing for program and erase. The

erase-verify command follows the same flow. Before starting a command sequence, it is necessary to

verify that there is no pending access error or protection violation (the ACCERR and PVIOL flags should

be cleared in the FSTAT register) It is then required to set the PPAGE register. The procedure is as follows:

Verify that all ACCERR and PVIOL flags in the FSTAT register are cleared.

Write to the core PPAGE register ($x030) to select one of the pages to be programmed if

programming in the $8000-$BFFF address range. There is no need to set PPAGE when

programming in the $4000-$7FFF or $C000-$FFFF address ranges.

After this possible initialization step the CBEIF flag should be tested to ensure that the address, data and

command buffers are empty. If so, the program/erase command write sequence can be started. The

following 3-step command write sequence must be strictly adhered to and no intermediate writes to the

Flash module are permitted between the 3 steps. It is possible to read any Flash register during a command

sequence. The command sequence is as follows:

Write the aligned data word to be programmed to the valid Flash address space. The address and

data will be stored in internal buffers. For program, all address bits are valid. For erase, the value

of the data bytes is don’t care. For mass erase, the address can be anywhere in the available address

space of the block to be erased. For sector erase the address bits[8:0] are ignored.

Write the program or erase command to the command buffer. These commands are listed in Table

4-1.

Clear the CBEIF flag by writing a “1” to it to launch the command. When the CBEIF flag is cleared,

the CCIF flag is cleared by hardware indicating that the command was successfully launched. The

CBEIF flag will be set again indicating the address, data and command buffers are ready for a new

command sequence to begin.

The completion of the command is indicated by the CCIF flag setting. The CCIF flag only sets when all

active and pending commands have been completed.

NOTE

The Command State Machine will flag errors in program or erase write sequences by means of the

ACCERR (access error) and PVIOL (protection violation) flags in the FSTAT register. An erroneous

command write sequence will abort and set the appropriate flag. If set, the user must clear the ACCERR

or PVIOL flags before commencing another command write sequence. By writing a 0 to the CBEIF flag

the command sequence can be aborted after the word write to the Flash address space or after writing a

command to the FCMD register and before the command is launched. Writing a “0” to the CBEIF flag in

this way will set the ACCERR flag.

A summary of the program algorithm is shown in Figure 4-2. For the erase algorithm, the user writes

either a mass or sector erase command to the FCMD register.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

FTS64K bảng dữ liệu(PDF) 32 Page - Freescale Semiconductor, Inc