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M3005LD bảng dữ liệu(PDF) 4 Page - STMicroelectronics

tên linh kiện M3005LD
Giải thích chi tiết về linh kiện  REMOTE CONTROL TRANSMITTER
PDF  10 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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M3005LD bảng dữ liệu(HTML) 4 Page - STMicroelectronics

  M3005LD Datasheet HTML 1Page - STMicroelectronics M3005LD Datasheet HTML 2Page - STMicroelectronics M3005LD Datasheet HTML 3Page - STMicroelectronics M3005LD Datasheet HTML 4Page - STMicroelectronics M3005LD Datasheet HTML 5Page - STMicroelectronics M3005LD Datasheet HTML 6Page - STMicroelectronics M3005LD Datasheet HTML 7Page - STMicroelectronics M3005LD Datasheet HTML 8Page - STMicroelectronics M3005LD Datasheet HTML 9Page - STMicroelectronics Next Button
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Flash Mode
Carrier Mode
fOSC
455kHz
600kHz
tP
4x tOSC
Flashed Pulse Width
tM
12 x tOSC
tOSC
Modulation Period
N
8*
Number of Modulation Pulses
TO
1152 x tOSC
1536 x tOSC
Basic Unit of Pulse Distance
tW
55296 x tOSC
73728 x tOSC
Word Distance
The following number of pulses may be selected by Metal option : N = 8, 12, 16.
Note : The different dividing ratio for TO and tW between flash mode and carrier mode is obtained by changing the modulo of a particular di-
vider from divide by 3 during flash mode to divide by 4 during carrier mode. This allows the use of a 600kHz ceramic resonator dur-
ing carrier mode to obtain a better noise immunity for the receiver without a significant change in TO and tW. For first samples, the
correct divider ration is obtained by a metal mask option. For final parts, this is automatically done together with the selection of
flash-/carrier mode.
Table 2 : Pulse Train Separation (tb)
Code
tb
Logic ”0”
2x TO
Logic ”1”
3x TO
Toggle Bit Time
2 x TO or 3 x TO
Table 3 : Transmission Mode and Sub-system
Adress Selection.
The sub-system address and the transmission
mode are defined by connecting the ADRM input
to one or more driver outputs (DRV0N To DRV6N)
of the key matrix. If more than one driver is con-
nected to ADRM, they must be decoupled by di-
odes.
Mode
Sub-system Address
Driver DRVnN for n =
#
S2
S1
S0
012345
6
F
L
A
S
H
E
D
0
1
2
3
4
5
6
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
O
X
X
X
X
X
O
X
X
X
X
O
X
X
X
O
X
X
O
XO
M
O
D
U
L
A
T
E
D
0
1
2
3
4
5
6
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
O
X
X
X
X
X
O
X
X
X
X
O
X
X
X
O
X
X
O
XO
O
O
O
O
O
O
O
O= connected to ADRM
blank= not connected to ADRM
X = don’t care
Table 1 : Pulse Train Timing
Mode
TO (ms)
tP (
µs)
tM (
µs)
tW (ms)
Flashed
2.53
8.8
-
121
Modulated
2.53
-
tOSC
121
M3005LAB1 - M3005LD
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